MCIMX257CJM4A Freescale, MCIMX257CJM4A Datasheet - Page 73

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MCIMX257CJM4A

Manufacturer Part Number
MCIMX257CJM4A
Description
Manufacturer
Freescale
Datasheet

Specifications of MCIMX257CJM4A

Lead Free Status / RoHS Status
Compliant

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Figure 39
timing parameters described in
Freescale Semiconductor
ADDR
BCLK
CS[x]
DATA
BCLK
EB[y]
ADDR
through
LBA
RW
OE
CS[x]
EB[y]
DATA
RW
LBA
OE
Figure 39. Synchronous Memory Timing Diagram for Read Access—WSC=1
Figure 44
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 6
Figure 40. Synchronous Memory Timing Diagram for Write Access—
Last Valid Address
Last Valid Address
give examples of basic WEIM accesses to external memory devices with the
Table 54
WE14
WE14
WE10
WE12
WE4
WE6
WE6
WE8
WE4
WSC=1, EBWA=1, EBWN=1, LBN=1
WE12
WE16
for specific control parameter settings.
WE15
WE13
V1
V1
WE19
V1
V1
WE5
WE5
WE9
WE7
Next Address
WE11
WE21
WE15
WE13
WE7
Next Address
WE17
73

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