MCIMX257CJM4A Freescale, MCIMX257CJM4A Datasheet - Page 59

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MCIMX257CJM4A

Manufacturer Part Number
MCIMX257CJM4A
Description
Manufacturer
Freescale
Datasheet

Specifications of MCIMX257CJM4A

Lead Free Status / RoHS Status
Compliant

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1
2
Freescale Semiconductor
SD1 + SD2 does not exceed 7.5 ns for 133 MHz.
Timing parameters are relevant only to SDR SDRAM. For the specific DDR SDRAM data related timing parameters, see
Table 46
SD10
SD9
ID
SDCLK
SDCLK
and
ADDR
DQM
RAS
CAS
Data out hold time
Active to read/write command period
Table
WE
DQ
CS
Table 42. DDR/SDR SDRAM Read Cycle Timing Parameters (continued)
47.
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 6
SD4
SD6
BA
Figure 26. SDR SDRAM Write Cycle Timing Diagram
2
SD5
Parameter
SD7
SD11
ROW / BA
SD12
SD1
SD3
SD4
SD13
Symbol
tOH
tRC
SD4
SD4
COL/BA
SD2
DATA
SD5
SD5
SD5
SD14
Min.
1.2
10
Max.
clock
Unit
ns
59

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