NQ80331M667 S L824 Intel, NQ80331M667 S L824 Datasheet - Page 14

• Manufacturer Part Number: NQ80331M667 S L824
• Manufacturer: Intel

Specifications of NQ80331M667 S L824

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Intel
Summary Table of Changes
Specification Changes
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®
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80331 I/O Processor
A-1
X
X
X
X
X
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X
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B-0
X
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Steppings
C-x
X
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D-0
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D-1
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Status
Fixed
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HPI# (High Priority Interrupt) is a maskable interrupt
PCIODT_EN Reset Strap Signal
LOCK# functionality has been de-featured
Watchdog Timer and Retry Timer has been de-featured
P_GNT# and P_REQ# signals have new ball locations on
B-0
Peripheral Performance Monitor Unit has been de-featured
Processor Device ID has been removed
1.5K pull-down required on AD[15] of the PBI bus
OCD and Receive Enable calibration de-featured
New Watchdog Timer (WDT) functionality in B-0 stepping
PWRDELAY needs only a pull-up for battery back-up mode
ARB_EN signal has been de-featured
Intel® 80331 I/O Processor Design Guide change for
Unbuffered DDR-I dual-banked DIMMs
DDRRES2 can be pulled down to reduce current during
self-refresh
Intel® 80331 I/O Processor Design Guide change for
Peripheral Bus Interface (PBI)
Intel® 80331 I/O Processor Design Guide change for
PCI/-X busses
Internal bus operates at 333 MHz for D-0 stepping
Application Accelerator Unit enhanced for D-0 stepping
Recommended DLL register values
DDR-II JEDEC initialization sequence includes writes to
EMRS2 and EMRS3
Case temperature (Tcase) change
Internal Clock Misalignment.
Specification Changes
Specification Update