MC9328MX21VG Freescale, MC9328MX21VG Datasheet - Page 22

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MC9328MX21VG

Manufacturer Part Number
MC9328MX21VG
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9328MX21VG

Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9328MX21VG
Manufacturer:
MUSIC
Quantity:
39
Part Number:
MC9328MX21VG
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Specifications
Note: All the timings assume that the hclk is running at 133 MHz.
Note: The MIN period of the 1T is assumed that MMD latch data at falling edge.
Note: If the MMD latch data at next rising edge, the ideally max clock can be as much as double, but because the BMI data pads
are slow pads and it max frequency can only up to 18MHz, the max clock frequency can only up to 36 MHz.
3.8.1.1.2
Figure 7
CS BMI checks the BMI_WRITE logic level to determine if the current cycle is a write cycle. If the BMI_
WRITE is logic low, it latches data into the RxFIFO on each falling edge of BMI_CLK/CS signal.
22
BMI_READ_REQ
BMI_CLK/CS
BMI_D[15:0]
BMI_WRITE
shows the MMD write BMI timing when MMD drives clock. On each falling edge of BMI_CLK/
transfer data setup time
transfer data hold time
read_req hold time
MMD Write BMI Timing
write setup time
Clock period
Item
(MMD_MODE_SEL=1, MASTER_MODE_SEL=0,MMD_CLKOUT=0)
Table 14. MMD Read BMI Timing Table when MMD Drives Clock
Figure 6. MMD (ATI) Drives Clock, MMD Read BMI Timing
MC9328MX21 Technical Data, Rev. 3.4
Symbol
Tdh
Tds
Trh
1T
Ts
Tds
1T
Ts
TxD1
Minimum
Tdh
TxD2
33.3
11
6
6
6
Typical
-
Maximum
Trh
24
14
14
Last TxD
Freescale Semiconductor
Unit
ns
ns
ns
ns
ns

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