MPC8349EVVAJFB Freescale, MPC8349EVVAJFB Datasheet - Page 48

• Manufacturer Part Number: MPC8349EVVAJFB
• Manufacturer: Freescale

Specifications of MPC8349EVVAJFB

• Family Name: MPC83xx
• Device Core: PowerQUICC II Pro
• Device Core Size: 32b
• Frequency (max): 533MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2V
• Operating Supply Voltage (max): 1.26V
• Operating Supply Voltage (min): 1.14V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 672
• Package Type: TBGA
• Lead Free Status / RoHS Status: Compliant

PCI
Table 46
48
PORESET to REQ64 hold time
Notes:
1. PCI timing depends on M66EN and the ratio between PCI1/PCI2. Refer to the PCI chapter of the reference manual for a
2. The symbols for timing specifications follow the pattern of t
3. See the timing measurement conditions in the PCI 2.3 Local Bus Specifications.
4. For active/float timing measurements, the Hi-Z or off-state is defined to be when the total current delivered through the
5. Input timings are measured at the pin.
6. The setup and hold time is with respect to the rising edge of PORESET.
Clock to output valid
Output hold from clock
Clock to output high impedance
Input setup to clock
Input hold from clock
REQ64 to PORESET setup time
PORESET to REQ64 hold time
Notes:
1. The symbols for timing specifications follow the pattern of t
2. See the timing measurement conditions in the PCI 2.3 Local Bus Specifications.
3. For active/float timing measurements, the Hi-Z or off-state is defined to be when the total current delivered through the
4. Input timings are measured at the pin.
5. The setup and hold time is with respect to the rising edge of PORESET.
description of M66EN.
and t
respect to the time the input signals (I) reach the valid state (V) relative to the PCI_SYNC_IN clock, t
to the high (H) state or setup time. Also, t
high (H) relative to the frame signal (F) going to the valid (V) state.
component pin is less than or equal to the leakage current specification.
and t
respect to the time the input signals (I) reach the valid state (V) relative to the PCI_SYNC_IN clock, t
to the high (H) state or setup time. Also, t
high (H) relative to the frame signal (F) going to the valid (V) state.
component pin is less than or equal to the leakage current specification.
(first two letters of functional block)(reference)(state)(signal)(state)
(first two letters of functional block)(reference)(state)(signal)(state)
provides the PCI AC timing specifications at 33 MHz.
MPC8349EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12
Parameter
Parameter
Table 45. PCI AC Timing Specifications at 66 MHz
Table 46. PCI AC Timing Specifications at 33 MHz
PCRHFV
PCRHFV
symbolizes PCI timing (PC) with respect to the time hard reset (R) went
symbolizes PCI timing (PC) with respect to the time hard reset (R) went
Symbol
Symbol
t
t
t
t
t
t
PCKHOV
t
t
PCRHRX
PCRHRX
PCKHOX
PCKHOZ
PCRVRH
for outputs. For example, t
for outputs. For example, t
PCIVKH
PCIXKH
(first two letters of functional block)(signal)(state)(reference)(state)
(first two letters of functional block)(signal)(state)(reference)(state)
2
1
Min
Min
3.0
—
—
0
2
0
5
0
1
PCIVKH
PCIVKH
(continued)
symbolizes PCI timing (PC) with
symbolizes PCI timing (PC) with
Max
Max
50
11
14
50
—
—
—
—
Freescale Semiconductor
SYS
SYS
, reference (K) going
, reference (K) going
clocks
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
for inputs
for inputs
Notes
Notes
2, 3
2, 4
2, 4
6
2
2
5
5