MC9S08QD2CSC Freescale, MC9S08QD2CSC Datasheet - Page 63

MC9S08QD2CSC

Manufacturer Part Number
MC9S08QD2CSC
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S08QD2CSC

Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
8MHz
Total Internal Ram Size
128Byte
# I/os (max)
4
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
4-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Package Type
SOIC N
Program Memory Type
Flash
Program Memory Size
2KB
Lead Free Status / RoHS Status
Compliant

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MC9S08QD2CSCR
0
5.8.7
This high-page register contains status and control bits for the RTI.
Freescale Semiconductor
RTICLKS
Reset:
Reset:
RTIACK
ID[7:0]
Field
Field
RTIE
RTIS
RTIF
7:0
2:0
7
6
5
4
W
W
R
R
System Real-Time Interrupt Status and Control Register (SRTISC)
RTIF
ID7
Part Identification Number — Each derivative in the HCS08 family has a unique identification number. The
MC9S08QD4 series is hard coded to the value 0x011. See also ID bits in
Real-Time Interrupt Flag — This read-only status bit indicates the periodic wakeup timer has timed out.
0 Periodic wakeup timer not timed out.
1 Periodic wakeup timer timed out.
Real-Time Interrupt Acknowledge — This write-only bit is used to acknowledge real-time interrupt request
(write 1 to clear RTIF). Writing 0 has no meaning or effect. Reads always return 0.
Real-Time Interrupt Clock Select — This read/write bit selects the clock source for the real-time interrupt.
0 Real-time interrupt request clock source is internal 1 kHz oscillator.
1 Real-time interrupt request clock source is 32 kHz ICS clock.
Real-Time Interrupt Enable — This read-write bit enables real-time interrupts.
0 Real-time interrupts disabled.
1 Real-time interrupts enabled.
Real-Time Interrupt Delay Selects — These read/write bits select the period for the RTI. See
0
0
7
7
= Unimplemented or Reserved
Figure 5-8. System Device Identification Register — Low (SDIDL)
= Unimplemented or Reserved
Figure 5-9. System RTI Status and Control Register (SRTISC)
RTIACK
ID6
0
0
0
6
6
Table 5-10. SRTISC Register Field Descriptions
Table 5-9. SDIDL Register Field Descriptions
MC9S08QD4 Series MCU Data Sheet, Rev. 6
RTICLKS
ID5
0
0
5
5
RTIE
ID4
0
0
4
4
Description
Description
Chapter 5 Resets, Interrupts, and General System Control
ID3
3
1
3
0
0
Table
ID2
0
0
2
2
5-8.
RTIS
ID1
0
0
1
1
Table 5-11
ID0
1
0
0
0
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