LE3100MICH S L8YC Intel, LE3100MICH S L8YC Datasheet - Page 18

• Manufacturer Part Number: LE3100MICH S L8YC
• Manufacturer: Intel

Specifications of LE3100MICH S L8YC

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

2.6.2
Table 2-3.
18
4.
5.
DC Voltage and Current Specification
Voltage and Current Specifications
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. Adherence to the voltage specifications for the processor are required to ensure reliable processor
VID Range
Core V
V
V
I
V
VTT_OUT_LEFT and
VTT_OUT_RIGHT I
I
I
I
CC
TT
CC_VCCPLL
CC_GTLREF
CC_BOOT
CCPLL
TT
the long-term reliability of the device. For functional operation, refer to the processor case temperature
specifications.
This rating applies to the processor and does not include any tray or packaging.
Failure to adhere to this specification can affect the long term reliability of the processor.
Each processor is programmed with a maximum valid voltage identification value (VID), which is set at
manufacturing and can not be altered. Individual maximum VID values are calibrated during manufacturing
such that two processors at the same frequency may have different settings within the VID range. Note
that this differs from the VID employed by the processor during a power management event (Thermal
Monitor 2, Enhanced Intel SpeedStep
Unless otherwise noted, all specifications in this table are based on estimates and simulations or empirical
data. These specifications will be updated with characterized data from silicon measurements at a later
date.
These voltages are targets only. A variable voltage source should exist on systems in the event that a
different voltage is required. See
The voltage specification requirements are measured across VCC_SENSE and VSS_SENSE lands at the
socket with a 100MHz bandwidth oscilloscope, 1.5 pF maximum probe capacitance, and 1 MΩ minimum
impedance. The maximum length of ground wire on the probe should be less than 5 mm. Ensure external
noise from the system is not coupled into the oscilloscope probe.
Refer to
The processor should not be subjected to any V
given current.
I
V
measured at the land.
Baseboard bandwidth is limited to 20 MHz.
This is the maximum total current drawn from the V
not include the current coming from on-board termination (R
appropriate platform design guide and the Voltage Regulator-Down (VRD) 11.0 Processor Power Delivery
Design Guidelines For Desktop LGA775 Socket to determine the total I
parameter is based on design characterization and is not tested.
operation.
CC_MAX
TT
Symbol
CC
must be provided via a separate voltage source and not be connected to V
specification is based on V
Table 2-4
CC
and
VID
Processor Numbers
(6MB Cache):
E3110
E3120
L3110
Default V
PLL V
2006 FMB
FSB termination voltage
(DC + AC specifications)
DC Current that may be drawn from
VTT_OUT_LEFT and VTT_OUT_RIGHT per land
I
I
I
I
CC
CC
CC
CC
Figure
for V
for V
for PLL land
for GTLREF
CC
TT
TT
CC
2-1for the minimum, typical, and maximum V
supply before V
supply after V
voltage for initial power up
Section 2.3
CC_
®
MAX
Parameter
technology, or Extended HALT State).
loadline. Refer to
CC
and Table 2-1 for more information.
V
775_VR_CONFIG_06A
3.00 GHz
3.16 GHz
775_VR_CONFIG_06
3.00 GHz
CC
CC
CC
stable
stable
and I
for
TT
plane by only the processor. This specification does
CC
combination wherein V
Figure 2-1
TT
), through the signal line. Refer to the
for details.
TT
0.8500
1.045
- 5%
drawn by the system. This
Min
-
-
-
-
-
CC
Refer to
allowed for a given current.
CC
Electrical Specifications
Figure 2-1
. This specification is
CC
1.10
1.50
1.10
Typ
exceeds V
-
Table
-
-
-
-
2-4,
1.3625
+ 5%
1.155
Max
580
130
200
4.5
4.6
CC_MAX
75
-
Datasheet
for a
Unit
mA
mA
µA
V
V
V
A
V
A
1
3, 4, 5
6
7, 8
9
Notes
11
2,