HS1-82C55ARH-8 Intersil, HS1-82C55ARH-8 Datasheet - Page 6

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HS1-82C55ARH-8

Manufacturer Part Number
HS1-82C55ARH-8
Description
Manufacturer
Intersil
Datasheet

Specifications of HS1-82C55ARH-8

Operating Temperature (max)
125C
Mounting
Through Hole
Lead Free Status / RoHS Status
Compliant
Irradiation Circuit
NOTE:
Functional Description
The HS-82C55ARH is a programmable peripheral interface
designed to allow microcomputer systems to control and
interface with all types of peripheral devices. It has the ability
to generate and respond to all asynchronous handshaking
signals necessary to transfer data to and from peripheral
devices, and it can also interrupt the processor when a
peripheral needs servicing. These capabilities allow the
HS-82C55ARH to be used in an unlimited number of
applications including EXTERNAL SYSTEM CONTROL,
ASYNCHRONOUS DATA TRANSFER, and SYSTEMS
MONITORING.
Data Bus Buffer
This three-state bidirectional 8-bit buffer is used to interface
the HS-82C55ARH to the system data bus (see Figure 8).
Data is transmitted or received by the buffer upon execution
of input or output instructions by the CPU. Control words and
status information are also transferred through the data bus
buffer.
13. VDD = 5.5V
+5.5V
CMOS PROGRAMMABLE PERIPHERAL INTERFACE
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
6
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
HS-82C55ARH
+5.5V
RESET
BIDIRECTIONAL
D7-
D0
Read/Write and Control Logic
The function of this block is to manage all of the internal and
external transfer of both Data and Control or Status words. It
accepts inputs from the CPU Address and Control busses
and in turn, issues commands to both of the Control Groups.
Group A and Group B Controls
The functional configuration of each port is programmed by
the systems software. In essence, the CPU writes a control
word to the HS-82C55ARH. The control word contains
information such as “mode”, “bit set”, “bit reset”, etc., that
initializes the functional configuration of the HS-82C55ARH.
Each of the Control blocks (Group A and Group B) accepts
“commands” from the Read/Write Control Logic, receives
“control words” from the internal data bus and issues the
proper commands to its associated ports.
Control Group - Port A and Port C upper (C7 - C4).
Control Group - Port B and Port C lower (C3 - C0).
Ports A, B, C
The HS-82C55ARH contains three 8-bit ports (A, B and C).
All can be configured to a wide variety of functional
characteristics by the system software but each has its own
special features or “personality” to further enhance the
power and flexibility of the HS-82C55ARH.
Port A
Port B
SUPPLIES
DATA BUS
WR
POWER
RD
A1
A0
CS
FIGURE 8. BLOCK DIAGRAM DATA BUS BUFFER,
One 8-bit data output latch/buffer and one 8-bit data input
latch. Both “pull-up” and “pull-down” bus hold devices are
present on Port A. See Figure 9A.
One 8-bit data input/output latch/buffer and one 8-bit data
input buffer. See Figure 9B.
CONTROL
BUFFER
READ/
WRITE
LOGIC
DATA
BUS
READ/WRITE, GROUP A AND B CONTROL
LOGIC FUNCTIONS
GND
+5V
8-BIT INTERNAL
CONTROL
CONTROL
GROUP
GROUP
DATA BUS
A
B
C LOWER
C UPPER
A PORT
A PORT
B PORT
B PORT
GROUP
GROUP
GROUP
GROUP
A (8)
B (8)
(4)
(4)
I/O
PA7-
PA0
I/O
PC7-
PC4
I/O
PC3-
PC0
I/O
PB7-
PB0

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