PNX8510HW/B1,557 NXP Semiconductors, PNX8510HW/B1,557 Datasheet - Page 46

• Manufacturer Part Number: PNX8510HW/B1,557
• Manufacturer: NXP Semiconductors

Specifications of PNX8510HW/B1,557

• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
Table 29:
* indicates not present in secondary video channel
9397 750 12612
Product data
Bit
6
5
4:0
Registers 0x2E–0x37 must be initialized to zero.
Offset 0x38 - GAIN_Y *
7:5
4:0
Offset 0x39 - GAIN_UV*
7:5
4:0
Offset 0x3A - INPCTL
7
6
5
4
3
2
1
Symbol
CVBSEN
CEN*
Unused
Unused
GAIN_Y*
Unused
GAIN_UV*
CBENB
QUALINVERT*
USE_QUAL*
DEDGE
SD_HD*
U2C
M2C
PNX8510/11 video registers
Access Value
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
…continued
1
1
-
-
0x1A
-
0x1A
0
1
0
0
1
1
1
Rev. 04 – 12 January 2004
Description
DAC1 control
0 = Video dac 1carries the luminance channel.
1 = Video dac 1 carries the CVBS channel.
DAC2 control
0 = Video dac 2 carries the red channel.
1 = Video dac 2 carries the chroma channel.
Gain adjust for Y component in SD-RGB/YUV data path, two’s
complement number to adjust the gain from -50% to +50%
Yout=Yin x (1+ GAIN_Y/32)
Gain adjust for U/V components in SD-RGB/YUV data path, two’s
complement number to adjust the gain from -50% to +50%
UVout=UVin x (1+ GAIN_UV/32)
Color bar generator
0 = Color bar generation switched off
1 = Color bar generation enabled (SD-CVBS/YC and SD-RGB/YUV
modes only)
0 = Leave the pixel qualifier untouched.
1 = Invert the incoming pixel qualifier.
Use qualifier enable
0 = No qualifier is used, QUALINVERT should be set.
1 = The HSYNC input is used as slice qualifier in interleaved mode.
Double edge mode
0 = Double edge mode off; either the interface is running at 2x
speed to get interleaved data in or only non-interleaved data
streams are accepted.
1 = Input data is latched at positive and negative edge. The
SLICE_DIR register determines which data slice goes in which
channel.
Video mode switch
0 = HD data path in operation; encoder runs idle.
1 = SD data path in operation; encoder is in CVBS/YC or RGB
mode.
0 = Y/R data channel coming from the D1 interface left unchanged
1 = Y/R MSB of data coming from the D1 interface is inverted.
0 = U/G data channel coming from the D1 interface left unchanged
1 = U/G MSB of data coming from the D1 interface is inverted.
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
PNX8510/11
Analog companion chip
46 of 92