PNX8510HW/B1,557 NXP Semiconductors, PNX8510HW/B1,557 Datasheet - Page 26
PNX8510HW/B1,557
Manufacturer Part Number
PNX8510HW/B1,557
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX8510HWB1557.pdf
(92 pages)
Specifications of PNX8510HW/B1,557
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Philips Semiconductors
9397 750 12612
Product data
7.2.2 Trigger generation
with 0. ”Duration” is a 10-bit value representing the number of clock cycles. “Select”
indicates whether the value is actually inserted into the video data stream or not.
“Value index” is a 3-bit index into the next table in the linked list called “Value array.”
Certain bits of the “value index” can also be used to generate a digital sync raster
provided at the H- and V-sync outputs of the PNX8510/11.
“Value array” can hold up to 8 values (counted from 0 though 7) which are 10-bit
signed 2’s complement.
To ease the trigger setup for the sync generation module, a set of registers is
provided to set up the screen raster defined as width and height. A trigger position
can be specified as an x, y coordinate within the overall dimensions of the screen
raster. If the x, y counter matches the specified coordinates, a trigger pulse is
generated which pre-loads the tables with their initial values. Refer to the 1080i
example for the trigger programming.
Important Notes
For the registers LCNT_ARRAY_ADR (offset 0x82), LTYPE_ARRAY_ADR (offset
0x86), LPATT_ARRAY_ADR (offset 0x8E), “addr+1” should be written to finish writing
the data meant for “addr,” for example:
LTYPE_ARRAY_LINE1 = 0x14
LTYPE_ARRAY_LINE2 = 0x05
LTYPE_ARRAY_LINE3 = 0x00
LTYPE_ARRAY_LINE_ADR = 0x01
Note the next address, 0x02, is written to finish writing to the previous address 0x01.
LTYPE_ARRAY_LINE_ADR = 0x02
LTYPE_ARRAY_LINE1 = 0x14
LTYPE_ARRAY_LINE2 = 0x03
LTYPE_ARRAY_LINE3 = 0x00
LTYPE_ARRAY_LINE_ADR = 0x02
Note the write to next address, 0x03
LTYPE_ARRAY_LINE_ADR = 0x03
LTYPE_ARRAY_LINE1 = 0x0C
LTYPE_ARRAY_LINE2 = 0x03
•
•
The “duration” in the “Line_Pattern_Array” that needs to be programmed should be
1 cycle less than the actual duration required.
For the registers LCNT_ARRAY_ADR (offset 0x82), LTYPE_ARRAY_ADR (offset
0x86), LPATT_ARRAY_ADR (offset 0x8E), “addr+1” should be written to finish
writing the data meant for “addr,” for example:
Rev. 04 – 12 January 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
PNX8510/11
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