IDT70V24L25PFI IDT, Integrated Device Technology Inc, IDT70V24L25PFI Datasheet - Page 10
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IDT70V24L25PFI
Manufacturer Part Number
IDT70V24L25PFI
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT70V24L25PFI.pdf
(25 pages)
Specifications of IDT70V24L25PFI
Density
64Kb
Access Time (max)
25ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
3.3V
Address Bus
24b
Package Type
TQFP
Operating Temp Range
-40C to 85C
Number Of Ports
2
Supply Current
180mA
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Word Size
16b
Number Of Words
4K
Lead Free Status / RoHS Status
Not Compliant
Waveform of Read Cycles
NOTES:
1. Timing depends on which signal is asserted last, OE, CE, LB, or UB.
2. Timing depends on which signal is de-asserted first, CE, OE, LB, or UB.
3. t
4. Start of valid data depends on which timing becomes effective last t
5. SEM = V
AC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range for 70V35/34
NOTES:
1. Transition is measured 0mV from Low or High-impedance voltage with Output Test Load (Figure 2).
2. This parameter is guaranteed by device characterization, but is not production tested.
3. To access RAM, CE = V
4. 'X' in part number indicates power rating (S or L).
READ CYCLE
t
t
t
t
t
t
t
t
t
t
t
t
RC
AA
ACE
ABE
AOE
OH
LZ
HZ
PU
PD
SOP
SAA
IDT70V35/34S/L (IDT70V25/24S/L)
High-Speed 3.3V 8/4K x 18 (8/4K x 16) Dual-Port Static RAM
has no relation to valid output data.
Symbol
BDD
delay is required only in case where opposite port is completing a write operation to the same address location for simultaneous read operations BUSY
IH
.
DATA
BUSY
Read Cycle Time
Address Access Time
Chip Enable Access Time
Byte Enable Access Time
Output Enable Access Time
Output Hold from Address Change
Output Low-Z Time
Output High-Z Time
Chip Enable to Power Up Time
Chip Disable to Power Down Time
Semaphore Flag Update Pulse (OE or SEM)
Semaphore Address Access
UB, LB
ADDR
R/W
OUT
OUT
CE
OE
IL
,
UB or LB = V
(1,2)
(1,2)
Parameter
IL
(3)
(3)
, and
(3)
(3)
(1,2)
SEM = V
(1,2)
(5)
t
t
t
t
AA
ACE
AOE
t
LZ
ABE
IH
(1)
(4)
.
(4)
(4)
(4)
To access semaphore, CE = V
ABE
,
t
t
RC
AOE
6.42
,
t
10
t
ACE
BDD
,
VALID DATA
(3,4)
t
AA
Min.
____
____
____
____
____
____
____
15
10
70V35/34X15
3
3
0
Com'l Only
or t
BDD
IH
or
.
(4)
UB & LB = V
Max.
____
____
____
____
____
15
15
15
10
10
15
15
Industrial and Commercial Temperature Ranges
Min.
IH
____
____
____
____
____
____
____
20
10
70V35/34X20
3
3
0
, and
Com'l
& Ind
SEM = V
t
(4)
HZ
t
(2)
OH
Max.
____
____
____
____
____
20
20
20
20
20
12
12
IL
.
Min.
____
____
____
____
____
____
____
25
10
70V35/34X25
3
3
0
Com'l Only
5624 drw 08
Max.
____
____
____
____
____
25
25
25
13
15
25
25
5624 tbl 11
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns