M378T2953CZ3-CD5 Samsung Semiconductor, M378T2953CZ3-CD5 Datasheet
M378T2953CZ3-CD5
Specifications of M378T2953CZ3-CD5
Related parts for M378T2953CZ3-CD5
M378T2953CZ3-CD5 Summary of contents
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... UDIMM DDR2 Unbuffered SDRAM MODULE 240pin Unbuffered Module based on 512Mb C-die 60FBGA & 84FBGA with Pb-Free INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS " ...
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... AC Input Test Conditions 11.0 IDD Specification Parameters Definition .................................................................................15 12.0 Operating Current Table ...........................................................................................................16 12.1 M378T6553CZ3 / M378T6553CZ0 : 512MB(64Mx8 *8) Module 12.2 M378T2953CZ3 / M378T2953CZ0 : 1GB(64Mx8 *16) Module 12.3 M378T3354CZ3 / M378T3354CZ0 : 256MB(32Mx16 *4) Module 12.4 M391T6553CZ3 / M391T6553CZ0 : 512MB(64Mx8 *9) ECC Module 12.5 M391T2953CZ3 / M391T2953CZ0 : 1GB(64Mx8 *18) ECC Module 13.0 Input/Output Capacitance ........................................................................................................19 14.0 Electrical Characteristics & ...
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UDIMM Revision History Revision Month Year 1.0 February 2005 1.1 March 2005 1.2 August 2005 1.3 January 2006 1.4 July 2006 1.5 October 2006 - Initial Release - Changed the IDD0/IDD3N/IDD3P current values. - Revised the IDD Current Values. - ...
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... UDIMM 1.0 DDR2 Unbuffered DIMM Ordering Information Part Number Density M378T3354CZ3-CE7/F7/E6/D5/CC M378T3354CZ0-CE7/F7/E6/D5/CC M378T6553CZ3-CE7/F7/E6/D5/CC M378T6553CZ0-CE7/F7/E6/D5/CC M378T2953CZ3-CE7/F7/E6/D5/CC M378T2953CZ0-CE7/F7/E6/D5/CC M391T6553CZ3-CE7/F7/E6/D5/CC M391T6553CZ0-CE7/F7/E6/D5/CC M391T2953CZ3-CE7/F7/E6/D5/CC M391T2953CZ0-CE7/F7/E6/D5/CC Note : 1. “Z” of Part number(11th digit) stand for Lead-free products. 2. “3” of Part number(12th digit) stand for Dummy Pad PCB products. ...
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... Connect, RFU = Reserved for Future Use 1. The TEST pin is reserved for bus analysis tools and is not connected on standard memory module products (DIMMs pins should not be connected to anything, including bussing within the NC group. 3. DQS9-17 are used on UDIMM as DM0-7, but DQS9-17 are unused on UDIMM designs. ...
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... Connect, RFU = Reserved for Future Use 1. The TEST pin is reserved for bus analysis tools and is not connected on standard memory module products (DIMMs pins should not be connected to anything, including bussing within the NC group. 3. DQS9-17 are used on UDIMM as DM0-7, but DQS9-17 are unused on UDIMM designs. ...
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... Power and ground for DDR2 SDRAM input buffers, and core logic. VDD and VDDQ pins are tied Supply DD SS these modules. DQS0-DQS8 Data strobe for input and output data. For Rawcards using x16 orginized DRAMs DQ0-7 connect to the LDQS pin of the In/Out DQS0-DQS8 DRAMs and DQ8-17 connect to the UDQS pin of the DRAM ...
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... UDIMM 8.0 Functional Block Diagram : 8.1 512MB, 64Mx64 Module - M378T6553CZ3 / M378T6553CZ0 (Populated as 1 rank of x8 DDR2 SDRAMs) S0 DQS0 DQS0 DM0 DM CS DQS DQS DQ0 I/O 0 DQ1 D0 I/O 1 DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS1 ...
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... UDIMM 8.2 512MB, 64Mx72 ECC Module - M391T6553CZ3 / M391T6553CZ0 S0 DQS0 DQS0 DM0 DM CS DQS DQS DQ0 I/O 0 DQ1 I DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS1 DM1 DM CS DQS DQS DQ8 I/O 0 DQ9 I DQ10 I/O 2 DQ11 ...
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... UDIMM 8.3 1GB, 128Mx64 Module - M378T2953CZ3 / M378T2953CZ0 (Populated as 2 ranks of x8 DDR2 SDRAMs DQS0 DQS0 DM0 DM CS DQS DQS DQ0 I/O 0 DQ1 I DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS1 DM1 DM CS DQS DQS DQ8 ...
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... UDIMM 8.4 1GB, 128Mx72 ECC Module - M391T2953CZ3 / M391T2953CZ0 S1 S0 DQS0 DQS0 DM0 DM CS DQS DQS DQ0 I/O 0 DQ1 I DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS1 DM1 DM CS DQS DQS DQ8 I/O 0 DQ9 I DQ10 I/O 2 ...
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... UDIMM 8.5 256MB, 32Mx64 Module - M378T3354CZ3 / M378T3354CZ0 (Populated as 1 rank of x16 DDR2 SDRAMs) DQS1 DQS1 DM1 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQS0 DQS0 DM0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQS3 DQS3 DM3 DQ24 DQ25 DQ26 ...
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UDIMM 9.0 Absolute Maximum DC Ratings Symbol Parameter Voltage on V pin relative Voltage on V pin relative DDQ DDQ Voltage on V pin relative DDL DDL Voltage on ...
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UDIMM 10.2 Operating Temperature Condition Symbol TOPER Operating Temperature Note : 1. Operating Temperature is the case surface temperature on the center/top side of the DRAM °C operation temperature range, doubling refresh commands in frequency ...
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UDIMM 11.0 IDD Specification Parameters Definition (IDD values are for full operating range of Voltage and Temperature) Symbol Operating one bank active-precharge current CK(IDD RC(IDD), t RAS = t RASmin(IDD); CKE is ...
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... IDD4W 1,320 IDD4R 1,360 IDD5B 1,240 IDD6 64 IDD7 2,040 * Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap. 12.2 M378T2953CZ3 / M378T2953CZ0 : 1GB(64Mx8 *16) Module Symbol E7(800@CL=5) IDD0 1,120 IDD1 1,200 IDD2P 128 IDD2Q 560 IDD2N ...
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... IDD3P-S 108 IDD3N 540 IDD4W 1,485 IDD4R 1,530 IDD5B 1,395 IDD6 72 IDD7 2,295 * Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap. F7(800@CL=6) E6(667@CL=5) D5(533@CL=4) 400 400 480 460 32 32 140 140 160 160 ...
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... IDD3N 900 IDD4W 1,845 IDD4R 1,890 IDD5B 1,755 IDD6 144 IDD7 2,835 * Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap. F7(800@CL=6) E6(667@CL=5) D5(533@CL=4) 1,170 1,125 1,350 1,260 144 144 630 630 720 ...
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... CASE DDR2-800(F7) DDR2-667(E6 min max min max - - 5 8 3. 70000 45 70000 DDR2 SDRAM (V =1.8V, V =1.8V DDQ Min Max Min M378T2953CZ3 M378T3354CZ3 M378T2953CZ0 M378T3354CZ0 - M391T2953CZ3 M391T2953CZ0 - 512Mb 1Gb 2Gb 4Gb 75 105 127.5 195 327.5 7.8 7.8 7.8 7.8 7.8 3 ...
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UDIMM 14.3 Timing Parameters by Speed Grade Parameter DQ output access time from CK/CK DQS output access time from CK/CK CK high-level width CK low-level width CK half period Clock cycle time, CL=x DQ and DM input hold time DQ ...
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UDIMM Parameter Exit active power down to read command tXARD Exit active power down to read command tXARDS (slow exit, lower power) CKE minimum pulse width tCKE (high and low pulse width) ODT turn-on delay tAOND ODT turn-on tAON ODT ...
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... UDIMM 15.0 Physical Dimensions : 15.1 64Mbx8 based 64Mx64/x72 Module (1 Rank) - M378T6553CZ3/M378T6553CZ0/M391T6553CZ3/M391T6553CZ0 (2) 2.50 5.00 4.00 2.50 1.50±0.10 Detail A The used device is 64M x8 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T51083QC 133.35 131.35 128.95 N/A (for x64) SPD ECC (for x72 63.00 4.00 0.80± ...
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... UDIMM 15.2 64Mbx8 based 128Mx64/x72 Module (2 Ranks) - M378T2953CZ3/M378T2953CZ0/M391T2953CZ3/M391T2953CZ0 (2) 2.50 5.00 4.00 2.50 1.50±0.10 Detail A The used device is 64M x8 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T51083QC 133.35 131.35 128.95 N/A (for x64) SPD ECC (for x72 63.00 N/A (for x64) ECC (for x72) 4 ...
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... UDIMM 15.3 32Mbx16 based 32Mx64 Module (1 Rank) - M378T3354CZ3/sM378T3354CZ0 (2) 2.50 5.00 4.00 2.50 1.50±0.10 Detail A The used device is 32M x16 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T51163QC 133.35 131.35 128. 63.00 4.00 0.80±0.05 3.80 1.00 Detail DDR2 SDRAM Units : Millimeters SPD 30 ...