M28W640HCB70ZB6E NUMONYX, M28W640HCB70ZB6E Datasheet - Page 18

• Manufacturer Part Number: M28W640HCB70ZB6E
• Manufacturer: NUMONYX

Specifications of M28W640HCB70ZB6E

• Cell Type: NOR
• Density: 64Mb
• Access Time (max): 70ns
• Interface Type: Parallel
• Boot Type: Bottom
• Address Bus: 22b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TFBGA
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 16b
• Number Of Words: 4M
• Supply Current: 18mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / RoHS Status: Compliant

4.6
4.7
18/72
Erase aborts if Reset turns to V
operation is aborted, the block must be erased again.
During erase operations the memory will accept the Read Status Register command and
the Program/Erase Suspend command, all other commands will be ignored. Typical Erase
times are given in
See
using the Erase command.
Program command
The memory array can be programmed word-by-word. Two bus write cycles are required to
issue the Program command:
During program operations the memory will accept the Read Status Register command and
the Program/Erase Suspend command. Typical Program times are given in
Program, Erase times and Program/Erase endurance
Programming aborts if Reset goes to V
program operation is aborted, the block containing the memory location must be erased and
reprogrammed.
See
the Program command.
Double Word Program command
This feature is offered to improve the programming throughput, writing a page of two
adjacent words in parallel.The two words must differ only for the address A0. Programming
should not be attempted when V
Three bus write cycles are necessary to issue the Double Word Program command:
Read operations output the Status Register content after the programming has started.
Programming aborts if Reset goes to V
program operation is aborted, the block containing the memory location must be erased and
reprogrammed.
See
flowchart for using the Double Word Program command.
Appendix
Appendix
Appendix
The first bus cycle sets up the Program command.
The second latches the address and the data to be written and starts the
Program/Erase controller.
The first bus cycle sets up the Double Word Program command
The second bus cycle latches the address and the data of the first word to be written
The third bus cycle latches the address and the data of the second word to be written
and starts the Program/Erase controller.
C,
C,
C,
Figure 19: Erase flowchart and
Figure 15: Program flowchart and
Figure 16: Double Word Program flowchart and pseudocode
Table 8: Program, Erase times and Program/Erase endurance
IL
PP
. As data integrity cannot be guaranteed when the erase
is not at V
IL
IL
. As data integrity cannot be guaranteed when the
. As data integrity cannot be guaranteed when the
PPH
pseudocode, for a suggested flowchart for
.
pseudocode, for the flowchart for using
cycles.
Table 8:
for the
cycles.