M38510/20702BEA QP SEMICONDUCTOR, M38510/20702BEA Datasheet - Page 30

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M38510/20702BEA

Manufacturer Part Number
M38510/20702BEA
Description
Manufacturer
QP SEMICONDUCTOR
Datasheet

Specifications of M38510/20702BEA

Lead Free Status / RoHS Status
Supplier Unconfirmed
procedures shall be used for programming.
4.10
a. Connect the device in the electrical configuration of programming. The waveforms on figure 5D and the
c. Increase V
d. Select the output where a logical high is desired by raising that output voltage to V
e. Enable the device by taking the chip enable(s) to a low level. This is done with a pulse PWE for 10 μs.
f. Verify that the bit has been programmed by first removing the programming voltage from the output and
g. If the device is not to be tested for V
h. Repeat steps 4.10b through 4.10f for each bit to be programmed to a high level. If the procedure is
i. For class S and B devices, if any bit does not verify as programmed it shall be considered a programming
b. Select the desired word by applying high or low levels to the appropriate address inputs. Disable the
Programming procedure for circuit G. The programming characteristics on table IVG and the following
programming characteristics of table IVG shall apply to these procedures.
device by applying a high level to one or more active low chip enable inputs. NOTE: Address and enable
inputs must be driven with TTL logic levels during programming and verification.
V
programming voltage, it must be capable of supplying 750 mA at 11.0 volts.
the slew rate to I
increase to V
internal circuits can only supply programming current to one bit at a time. Outputs not being programmed
must be left open or connected to a high impedance source of 20 kΩ minimum (remember that the outputs
of the device are disabled at this time).
The 10 μs duration refers to the time that the circuit (device) is enabled. Normal input levels are used and
rise and fall times are not critical.
then reducing V
During verification, the loading of the output must be within specified I
verification of step f is to be performed at a V
verification, must be at least 2.0 volts. The 4 volt V
entire operating range.
performed on an automatic programmer, the duty cycle of V
to a maximum of 25%. This is necessary to minimize device junction temperatures. After all selected bits
are programmed, the entire contents of the memory should be verified.
reject.
CC
is the source of the current required to program the fuse, as well as the I
CC
CCP
from nominal to V
CC
RR
, but must precede it. It is critical that only one output at a time be programmed since the
to 5.0 V (±0.25 V). The device must be enabled to sense the state of the outputs.
(1.0 to 10.0 V/μs). This voltage change may occur simultaneously with the V
CCP
OH
(10.5 ±0.5 V) with a slew rate limit of I
MIL-M-38510/207E
over the entire operating range subsequent to programming, the
CC
30
level of 4.0 volt ( ±0.2 V ). V
CC
verification assures minimum V
CC
at the programming voltage must be limited
OL
and I
RR
OH
CC
OH
(1.0 to 10.0 V/μs). Since
, during the 4 volt
for the device at the
limits.
OP
(10.5 ±0.5 V). Limit
OH
levels over the
CC

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