M38510/20702BEA QP SEMICONDUCTOR, M38510/20702BEA Datasheet - Page 28

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M38510/20702BEA

Manufacturer Part Number
M38510/20702BEA
Description
Manufacturer
QP SEMICONDUCTOR
Datasheet

Specifications of M38510/20702BEA

Lead Free Status / RoHS Status
Supplier Unconfirmed
4.9 Programming procedure for circuit C. The programming characteristics in table IVC and the following
procedures shall apply for programming the device:
a. Connect the device in the electrical configuration for programming. The waveforms on figure 5C and the
b. Terminate all device outputs with a 10 kΩ resistor to V
c. Address the PROM with the binary address of the selected word to be programmed. Raise V
d. After a t
e. After a t
f. After a t
g. Other bits in the same word may be programmed sequentially while the V
h. Repeat 4.9b through 4.9g for all other bits to be programmed.
i. To verify programming after t
j.
programming characteristics in table IVC shall apply for programming to these procedures.
Program one output at a time.
supplied with fuses generating a low-level logic output. Programming a fuse will cause the output to go to a
high-level logic in the verify mode
applying V
on figure 5C.
input. The programmed output should remain in the “1” state. Again lower V
the programmed output remains in the “1” state.
reject.
For class S and B devices, if any bit does not verify as programmed, it shall be considered a programming
D
D
D
delay (10 μs), apply only one V
delay (10 μs), pulse CE input to logic “0” for a duration of t
delay (10 μs), remove the V
OUT
pulses to each output to be programmed allowing a delay of t
D
(10 μs) delay, lower V
.
OUT
MIL-M-38510/207E
OUT
pulse from the programmed output. Note that the PROM is
pulse to the output to be programmed.
28
CC
CC
to V
.
CCH
and apply a logic “0” level to both CE
P
.
CC
D
CC
input is at the V
between pulses as shown
and V
CCL
and verify that
CCP
CC
to V
level by
CCP
.

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