MT48LC16M16A2P-75:D Micron Technology Inc, MT48LC16M16A2P-75:D Datasheet - Page 75

• Manufacturer Part Number: MT48LC16M16A2P-75:D
• Description: IC, SDRAM, 256MBIT, 133MHZ, TSOP-54
• Manufacturer: Micron Technology Inc
• Type: SDRAMr
• Series: -r

Specifications of MT48LC16M16A2P-75:D

• Organization: 16Mx16
• Density: 256Mb
• Address Bus: 15b
• Access Time (max): 6/5.4ns
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 135mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Memory Type: DRAM - Sychronous
• Memory Configuration: 16 X 16
• Access Time: 5.4ns
• Page Size: 256Mbit
• Memory Case Style: TSOP
• No. Of Pins: 54
• Operating Temperature Range: 0°C To +70°C
• Format - Memory: RAM
• Memory Size: 256M (16Mx16)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 54-TSOP (0.400", 10.16mm Width)
• Lead Free Status / RoHS Status: Compliant
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

Figure 44: Single READ Without Auto Precharge
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. N 1/10 EN
Command
BA0, BA1
Address
DQM
CLK
CKE
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
T0
Bank
Row
Row
t CMH
t AH
t AH
t AH
t CKH
t RCD
t RAS
t RC
t CK
Note:
T1
NOP
1. For this example, BL = 1, CL = 2, and the READ burst is followed by a manual PRECHARGE.
Disable auto precharge
t CL
t CMS
Column m
T2
Bank
READ
t CMH
t CH
CL = 2
T3
NOP
t LZ
t AC
75
T4
NOP
D
t OH
OUT
t HZ
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Single bank
PRECHARGE
All banks
Bank(s)
T5
256Mb: x4, x8, x16 SDRAM
T6
t RP
NOP
PRECHARGE Operation
© 1999 Micron Technology, Inc. All rights reserved.
ACTIVE
Bank
Row
Row
T7
T8
NOP
Don’t Care
Undefined