MT48LC16M16A2P-75:D Micron Technology Inc, MT48LC16M16A2P-75:D Datasheet - Page 53

IC, SDRAM, 256MBIT, 133MHZ, TSOP-54

MT48LC16M16A2P-75:D

Manufacturer Part Number
MT48LC16M16A2P-75:D
Description
IC, SDRAM, 256MBIT, 133MHZ, TSOP-54
Manufacturer
Micron Technology Inc
Type
SDRAMr
Series
-r

Specifications of MT48LC16M16A2P-75:D

Organization
16Mx16
Density
256Mb
Address Bus
15b
Access Time (max)
6/5.4ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
135mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Memory Type
DRAM - Sychronous
Memory Configuration
16 X 16
Access Time
5.4ns
Page Size
256Mbit
Memory Case Style
TSOP
No. Of Pins
54
Operating Temperature Range
0°C To +70°C
Format - Memory
RAM
Memory Size
256M (16Mx16)
Speed
133MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
54-TSOP (0.400", 10.16mm Width)
Lead Free Status / RoHS Status
Compliant
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant

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Figure 21: Consecutive READ Bursts
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. N 1/10 EN
Note:
Command
Command
Address
Address
1. Each READ command can be issued to any bank. DQM is LOW.
CLK
CLK
DQ
DQ
T0
T0
Bank,
READ
READ
Col n
Bank,
Col n
CL = 2
CL = 3
T1
T1
NOP
NOP
53
T2
T2
NOP
NOP
D
OUT
n
T3
T3
NOP
NOP
Micron Technology, Inc. reserves the right to change products or specifications without notice.
D
D
n + 1
OUT
OUT
READ
T4
READ
T4
Bank,
Bank,
Col b
Col b
X = 1 cycle
D
n + 2
D
Transitioning data
OUT
OUT
256Mb: x4, x8, x16 SDRAM
X = 2 cycles
T5
T5
NOP
NOP
D
D
n + 3
OUT
OUT
© 1999 Micron Technology, Inc. All rights reserved.
T6
T6
NOP
NOP
READ Operation
D
D
OUT
OUT
b
Don’t Care
T7
NOP
D
OUT

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