RD38F2040W0YBQ0 SB93 Micron Technology Inc, RD38F2040W0YBQ0 SB93 Datasheet - Page 47

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RD38F2040W0YBQ0 SB93

Manufacturer Part Number
RD38F2040W0YBQ0 SB93
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of RD38F2040W0YBQ0 SB93

Operating Temperature (max)
85C
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
128-Mbit W18 Family with Synchronous PSRAM
Table 22: Cautionary Command Sequences
9.5
9.5.1
9.6
9.6.1
November 2007
Order Number: 311760-10
PSRAM Self-Refresh Operation
Unlike DRAMs, The PSRAM relieves the host system from issuing refresh commands.
Self-refresh operations are autonomously scheduled and performed by the PSRAM
device. In synchronous mode of operations (variable latency Read), the additional
WAIT cycles are used to indicate when the data output is delayed in case a burst
initiated access collides with an ongoing refresh cycle.
PSRAM Self-Refresh Operations at Low Frequency
At low frequencies (< 100 KHz), the PSRAM can support only asynchronous read (non-
page and non-burst modes) operations. All other operations (asynchronous writes,
page-mode reads, and synchronous burst-mode accesses) are subject to refresh
restrictions.
PSRAM Burst Suspend, Interrupt, or Termination
PSRAM Burst Suspend
While in synchronous burst operation, the bus interface may need to be assigned to
other memory transaction sharing the same bus. Burst suspend is used to fulfill this
purpose. Keeping CE# low (WAIT stays active although the DQ are tri-stated), burst
suspend is initiated by halting CLK. CLK can stay at either high or low state. Burst
suspend may also by initiated while WAIT is asserted during the initial latency period or
at the end of a row.
As specified, duration of keeping CE# low can not exceed tCSL maximum so that
internal refresh operation is able to run properly. In the event that tCSL maximum may
be exceeded, termination of burst by bringing CE# high is strongly recommended
instead of using burst suspend mode.
Cautionary Command Sequence #1
Cautionary Command Sequence #2
Address
Command
Address
Command
(WE# controlled)
Async Read
Async Write
Max
Max
Async Read
Async Read
Max
Max
Async Write
Async Write
Max
Max
Datasheet
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