LRS1806C Sharp Electronics, LRS1806C Datasheet - Page 16

• Manufacturer Part Number: LRS1806C
• Manufacturer: Sharp Electronics

Specifications of LRS1806C

• Lead Free Status / RoHS Status: Supplier Unconfirmed

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6. Status Register Definition
SR.15 - SR.8 = RESERVED FOR FUTURE
SR.7 = WRITE STATE MACHINE STATUS (WSMS)
SR.6 = BLOCK ERASE SUSPEND STATUS (BESS)
SR.5 = BLOCK ERASE AND FULL CHIP ERASE
SR.4 = (PAGE BUFFER) PROGRAM STATUS (PBPS)
SR.3 = F-V
SR.2 = (PAGE BUFFER) PROGRAM SUSPEND
SR.1 = DEVICE PROTECT STATUS (DPS)
SR.0 = RESERVED FOR FUTURE ENHANCEMENTS (R)
WSMS
1 = Ready
0 = Busy
1 = Block Erase Suspended
0 = Block Erase in Progress/Completed
1 = Error in Block Erase or Full Chip Erase
0 = Successful Block Erase or Full Chip Erase
1 = Error in (Page Buffer) Program
0 = Successful (Page Buffer) Program
1 = F-V
0 = F-V
1 = (Page Buffer) Program Suspended
0 = (Page Buffer) Program in Progress/Completed
1 = Erase or Program Attempted on a
0 = Unlocked
15
R
7
Locked Block, Operation Abort
STATUS (BEFCES)
STATUS (PBPSS)
PP
PP
PP
STATUS (VPPS)
LOW Detect, Operation Abort
OK
ENHANCEMENTS (R)
BESS
14
R
6
BEFCES
13
R
5
Status Register Definition
PBPS
12
R
4
L R S1 8 3 6
Notes:
Status Register indicates the status of the partition, not WSM
(Write State Machine). Even if the SR.7 is “1”, the WSM may
be occupied by the other partition when the device is set to 2, 3
or 4 partitions configuration.
Check SR.7 or F-RY/BY to determine block erase, full chip
erase, (page buffer) program completion. SR.6 - SR.1 are
invalid while SR.7= “0”.
If both SR.5 and SR.4 are “1”s after a block erase, full chip
erase, page buffer program, set/clear block lock bit, set block
lock-down bit or set partition configuration register attempt, an
improper command sequence was entered.
SR.3 does not provide a continuous indication of F-V
The WSM interrogates and indicates the F-V
Block Erase, Full Chip Erase, (Page Buffer) Program com-
mand sequences. SR.3 is not guaranteed to report accurate
feedback when F-V
SR.1 does not provide a continuous indication of block lock
bit. The WSM interrogates the block lock bit only after Block
Erase, Full Chip Erase, (Page Buffer) Program command
sequences. It informs the system, depending on the attempted
operation, if the block lock bit is set. Reading the block lock
configuration codes after writing the Read Identifier Codes
command indicates block lock bit status.
SR.15 - SR.8 and SR.0 are reserved for future use and should
be masked out when polling the status register.
VPPS
11
R
3
PP
PBPSS
10
R
2
V
PPH1/2
or V
PPLK
DPS
R
9
1
.
PP
level only after
PP
R
R
8
0
level.
13