S71PL129JB0BAW9Z0 Spansion Inc., S71PL129JB0BAW9Z0 Datasheet - Page 50

• Manufacturer Part Number: S71PL129JB0BAW9Z0
• Manufacturer: Spansion Inc.

Specifications of S71PL129JB0BAW9Z0

• Lead Free Status / RoHS Status: Compliant

48
Chip Erase Command Sequence
Note: See
Chip erase is a six bus cycle operation. The chip erase command sequence is ini-
tiated by writing two unlock cycles, followed by a set-up command. Two
additional unlock write cycles are then followed by the chip erase command,
which in turn invokes the Embedded Erase algorithm. The device does not require
the system to preprogram prior to erase. The Embedded Erase algorithm auto-
matically preprograms and verifies the entire memory for an all zero data pattern
prior to electrical erase. The system is not required to provide any controls or tim-
ings during these operations.
for the chip erase command sequence.
When the Embedded Erase algorithm is complete, that bank returns to the read
mode and addresses are no longer latched. The system can determine the status
of the erase operation by using DQ7, DQ6, DQ2, or RY/BY#. Refer to
eration Status”
Any commands written during the chip erase operation are ignored. Note that Se-
cured Silicon Sector, autoselect, and CFI functions are unavailable when a
[program/erase] operation is in progress. However, note that a hardware reset
immediately terminates the erase operation. If that occurs, the chip erase com-
mand sequence should be reinitiated once that bank has returned to reading
array data, to ensure data integrity.
Figure 5
Operations
diagrams.
illustrates the algorithm for the erase operation. See the
Table 12
tables in
on page 56 for information on these status bits.
Increment Address
for program command sequence.
AC Characteristics
S71PL129JC0/S71PL129JB0/S71PL129JA0
Figure 4. Program Operation
A d v a n c e
Embedded
in progress
Table 12
algorithm
Program
No
shows the address and data requirements
for parameters, and
Command Sequence
Write Program
Last Address?
Programming
I n f o r m a t i o n
from System
Verify Data?
Completed
Data Poll
START
Yes
Yes
Figure 16
No
Erase/Program
“Write Op-
for timing
S71PL129Jxx_00_A8 October 28, 2005