S71PL129JB0BAW9Z0 Spansion Inc., S71PL129JB0BAW9Z0 Datasheet - Page 134

• Manufacturer Part Number: S71PL129JB0BAW9Z0
• Manufacturer: Spansion Inc.

Specifications of S71PL129JB0BAW9Z0

• Lead Free Status / RoHS Status: Compliant

Features
Pin Description
This document contains information on one or more products under development at Spansion LLC. The information is intended to help you evaluate this product. Do not
design in this product without contacting the factory. Spansion LLC reserves the right to change or discontinue work on this proposed product without notice.
pSRAM Type 7
16Mb(1M word x 16-bit)
32Mb(2M word x 16-bit)
64Mb(4M word x 16-bit)
CMOS 1M/2M/4M-Word x 16-bit pSRAM
Asynchronous SRAM Interface
Fast Access Time
— t
— t
8 words Page Access Capability
— t
CE
CE
PAA
= t
= t
= 20 ns max (32M/64M)
AA
AA
= 60 ns max (16M)
= 65 ns max (32M/64M)
Publication Number S71PL129Jxx_00
Pin Name
A
DQ
21
DQ
CE1#
WE#
OE#
UB#
LB#
CE2
V
V
DD
to A
16
SS
8
-
-
1
9
0
Address Input: A
Chip Enable (Low Active)
Chip Enable (High Active)
Write Enable (Low Active)
Output Enable (Low Active)
Upper Byte Control (Low Active)
Lower Byte Control (Low Active)
Upper Byte Data Input/Output
Lower Byte Data Input/Output
Power Supply
Ground
Revision A
19
to A
0
for 16M, A
Amendment 8
Low Voltage Operating Condition
— V
Wide Operating Temperature
— TA = -30°C to +85°C
Byte Control by LB and UB
Various Power Down modes
— Sleep (16M)
— Sleep, 4M-bit Partial, or 8M-bit Partial (32M)
— Sleep, 8M-bit Partial, or 16M-bit Partial (64M)
Description
DD
20
= +2.7 V to +3.1 V
to A
0
Issue Date October 28, 2005
for 32M, A
21
to A
0
INFORMATION
for 64M
ADVANCE