UCB1400BE128 NXP Semiconductors, UCB1400BE128 Datasheet - Page 38
UCB1400BE128
Manufacturer Part Number
UCB1400BE128
Description
Manufacturer
NXP Semiconductors
Datasheet
1.UCB1400BE128.pdf
(64 pages)
Specifications of UCB1400BE128
Single Supply Voltage (typ)
3.3V
Single Supply Voltage (min)
3V
Single Supply Voltage (max)
3.6V
Package Type
LQFP
Lead Free Status / RoHS Status
Compliant
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Philips Semiconductors
9397 750 09611
Product data
12.5 Record Gain register (index 0x1C)
12.6 General Purpose register (index 0x20)
Table 19:
Register address: 0x1C; default: 8000
Table 20:
Table 21:
Register address: 0x20; default: 0000
Table 22:
The LPBK bit enables loopback of the ADC output to the DAC input without involving
the AC-link, allowing for full system performance measurements.
Bit
D15
D14 - D12
D11 - D8
D7 - D4
D3 - D0
Bit
D15 - D8
D7
D6 - D0
Bit
Symbol
Bit
Symbol
Bit
Symbol
Bit
Symbol
Record Gain register
Description of Master Volume register bits
General Purpose register
Description of General Purpose register bits
LPBK
D15
D15
RM
D7
D7
X
X
Symbol
RM
X
GL3 - GL0
X
GR3 - GR0
Symbol
X
LPBK
X
Rev. 02 — 21 June 2002
D14
D14
D6
D6
X
X
X
X
Type
RW
R
RW
R
RW
Type
R
RW
R
D13
D13
D5
D5
X
X
X
X
Description
Master Record mute.
Reserved.
Left channel record gain in steps of 1.5 dB
(0000 = 0 dB; 1111 = 22.5 dB).
Reserved.
Right channel record gain in steps of 1.5 dB
(0000 = 0 dB; 1111 = 22.5 dB).
Description
Reserved.
ADC/DAC loopback mode (ADC output to DAC
input).
Reserved.
Audio codec with touch screen controller
D12
D12
D4
D4
X
X
X
X
GR3
and power management monitor
D11
GL3
D11
D3
D3
X
X
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
GR2
D10
GL2
D10
D2
D2
X
X
UCB1400
GR1
GL1
D9
D1
D9
D1
X
X
GR0
37 of 63
GL0
D8
D0
D8
D0
X
X
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