UCB1400BE128 NXP Semiconductors, UCB1400BE128 Datasheet - Page 21
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UCB1400BE128
Manufacturer Part Number
UCB1400BE128
Description
Manufacturer
NXP Semiconductors
Datasheet
1.UCB1400BE128.pdf
(64 pages)
Specifications of UCB1400BE128
Single Supply Voltage (typ)
3.3V
Single Supply Voltage (min)
3V
Single Supply Voltage (max)
3.6V
Package Type
LQFP
Lead Free Status / RoHS Status
Compliant
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Philips Semiconductors
9. Audio codec
9397 750 09611
Product data
Fig 14. Audio codec block diagram.
LINE_OUT_R
LINE_OUT_L
LINE_IN_R
LINE_IN_L
VREFDRV
MICGND
MICP
HEADPHONE
9.1 ADC analog front-end
DRIVER
24.576 MHz
The analog front-end of the UCB1400 consists of one stereo ADC with a selector in
front of it. Using this selector, one can either select the microphone input with a
dedicated Low Noise Amplifier (LNA), or the line input with a Programmable Gain
Amplifier (PGA). Via appropriate AC ’97 register settings, the following modes can be
supported:
0/20 dB
•
•
•
•
PGA
PGA
LNA
GR
GL
Standby mode: all PGAs, LNA and ADCs are powered down.
Stereo line in mode: the PGAs are used, and the LNA is powered down.
Microphone mode: the PGAs and right channel ADC are powered down, and
MICGND switch is on. The mono microphone signal can be sent to both left and
right input of the decimation filter via a MUX in front of the decimation input.
One line-in and one microphone mode: the left PGA is powered down.
(SL = MIC) & NOT POWERED DOWN
FSDAC
FSDAC
SR = LINE_IN_L
PLL
1
0
Rev. 02 — 21 June 2002
MODULE
CLOCK
DR, AR
ADC
ADC
SHAPER
NOISE
SR = LINE_IN_R
INTERPOLATION
1
0
FILTER
BB, TR, DE, ML, MR, MM
OVERLOAD DETECTION
Audio codec with touch screen controller
DECIMATION
DC, HIPS, GL, GR, RM
FILTER
FEATURES
DAC CLOCKS
ADC CLOCKS
OVFL
DSP
and power management monitor
LPBK
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
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1
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LEFT, RIGHT
UCB1400
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SN00245
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