ADAV803AST Analog Devices Inc, ADAV803AST Datasheet - Page 53

• Manufacturer Part Number: ADAV803AST
• Manufacturer: Analog Devices Inc

Specifications of ADAV803AST

• Single Supply Voltage (typ): 3.3V
• Single Supply Voltage (min): 3V
• Single Supply Voltage (max): 3.6V
• Package Type: LQFP
• Lead Free Status / RoHS Status: Not Compliant

PLL Control Register 1—Address 1110100 (0x74)
Table 128. PLL Control Register 1 Bit Map
7
DIRIN_CLK1
Table 129. PLL Control Register 1 Bit Descriptions
Bit Name
DIRIN_CLK[1:0]
MCLKODIV
PLLDIV
PLL2PD
PLL1PD
XTLPD
SYSCLK3
6
DIRIN_CLK0
Recovered S/PDIF clock sent to SYSCLK3.
Divide input MCLK by 2 to generate MCLKO.
Divide XIN by 2 to generate the PLL master clock.
Power-down PLL2.
Power-down PLL1.
Power-down XTAL oscillator.
Clock output for SYSCLK3.
Description
00 = SYSCLK3 comes from PLL block.
01 = Reserved.
10 = Reserved.
11 = SYSCLK3 is the recovered S/PDIF clock from DIRIN.
0 = Disabled.
1 = Enabled.
0 = Disabled.
1 = Enabled.
0 = Normal.
1 = Power-down.
0 = Normal.
1 = Power-down.
0 = Normal.
1 = Power-down.
0 = 512 × f
1 = 256 × f
5
MCLKODIV
S
S
.
.
4
PLLDIV
Rev. A | Page 53 of 60
3
PLL2PD
2
PLL1PD
1
XTLPD
0
SYSCLK3
ADAV803