SAA7105E/V1/G-T NXP Semiconductors, SAA7105E/V1/G-T Datasheet - Page 11

• Manufacturer Part Number: SAA7105E/V1/G-T
• Description: Video ICs PC-DENC
• Manufacturer: NXP Semiconductors

Specifications of SAA7105E/V1/G-T

• Adc/dac Resolution: 10b
• Screening Level: Commercial
• Package Type: LBGA
• Pin Count: 156
• Lead Free Status / RoHS Status: Compliant
• Other names: SAA7105E/V1/G,518

Philips Semiconductors
7.3
The three 256 byte RAMs of this block can be addressed
by three 8-bit wide signals, thus it can be used to build any
transformation, e.g. a gamma correction for RGB signals.
In the event that the indexed colour data is applied, the
RAMs are addressed in parallel.
The LUTs can either be loaded by an I
or can be part of the pixel data input through the PD port.
In the latter case, 256
expected at the beginning of the input video line, two lines
before the line that has been defined as first active line,
until the middle of the line immediately preceding the first
active line. The first 3 bytes represent the first RGB LUT
data, and so on.
7.4
A 32
map of the cursor can be uploaded by an I
access to specific registers or in the pixel data input
through the PD port. In the latter case, the 256 bytes
defining the cursor bit map (2 bits per pixel) are expected
immediately following the last RGB LUT data in the line
preceding the first active line.
The cursor bit map is set up as follows: each pixel
occupies 2 bits. The meaning of these bits depends on the
CMODE I
Transparent means that the input pixels are passed
through, the ‘cursor colours’ can be programmed in
separate registers.
The bit map is stored with 4 pixels per byte, aligned to the
least significant bit. So the first pixel is in bits 0 and 1, the
next pixel in bits 3 and 4 and so on. The first index is the
column, followed by the row; index 0,0 is the upper left
corner.
Table 3 Layout of a byte in the cursor bit map
For each direction, there are 2 registers controlling the
position of the cursor, one controls the position of the
‘hot spot’, the other register controls the insertion position.
2004 Mar 04
pixel n + 3
D1
D7
Digital video encoder
RGB LUT
Cursor insertion
32 dots cursor can be overlaid as an option; the bit
D0
D6
2
C-bus register as described in Table 5.
pixel n + 2
D1
D5
D0
3 bytes for the R, G and B LUT are
D4
pixel n + 1
D1
D3
D0
2
D2
C-bus write access
2
C-bus write
pixel n
D1
D1
D0
D0
11
The hot spot is the ‘tip’ of the pointer arrow. It can have any
position in the bit map. The actual position registers
describe the co-ordinates of the hot spot. Again 0,0 is the
upper left corner. While it is not possible to move the
hot spot beyond the left respectively upper screen border
this is perfectly legal for the right respectively lower border.
It should be noted that the cursor position is described
relative to the input resolution.
Table 4 Cursor bit map
Table 5 Cursor modes
0
1
2
...
6
7
...
254
255
00
01
10
11
PATTERN
CURSOR
BYTE
row 0
column 3
row 0
column 7
row 0
column
11
...
row 0
column
27
row 0
column
31
...
row 31
column
27
row 31
column
31
D7
second cursor colour second cursor colour
first cursor colour
transparent
inverted input
CMODE = 0
D6
SAA7104E; SAA7105E
row 0
column 2
row 0
column 6
row 0
column
10
...
row 0
column
26
row 0
column
30
...
row 31
column
26
row 31
column
30
D5
CURSOR MODE
D4
row 0
column 1
row 0
column 5
row 0
column 9
...
row 0
column
25
row 0
column
29
...
row 31
column
25
row 31
column
29
D3
first cursor colour
transparent
auxiliary cursor
colour
Product specification
CMODE = 1
D2
row 0
column 0
row 0
column 4
row 0
column 8
...
row 0
column
24
row 0
column
28
...
row 31
column
24
row 31
column
28
D1
D0