ADV7340BSTZ Analog Devices Inc, ADV7340BSTZ Datasheet - Page 67

• Manufacturer Part Number: ADV7340BSTZ
• Manufacturer: Analog Devices Inc

Specifications of ADV7340BSTZ

• Number Of Dac's: 6
• Adc/dac Resolution: 12b
• Screening Level: Industrial
• Package Type: LQFP
• Pin Count: 64
• Lead Free Status / RoHS Status: Compliant

to the DNR filter output that lies below the set threshold range.
The result is then subtracted from the original signal.
In DNR sharpness mode, the range of gain values is 0 to 0.5 in
increments of 1/16. This factor is applied to the DNR filter
output that lies above the threshold range. The result is added to
the original signal.
DNR27 TO DNR24 = 0x01
DNR Threshold—Subaddress 0xA4, Bits[5:0]
These six bits are used to define the threshold value in the range
of 0 to 63. The range is an absolute value.
Border Area—Subaddress 0xA4, Bit 6
When this bit is set to Logic 1, the block transition area can be
defined to consist of four pixels. If this bit is set to Logic 0, the
border transition area consists of two pixels, where one pixel
refers to two clock cycles at 27 MHz.
Block Size Control—Subaddress 0xA4, Bit 7
This bit is used to select the size of the data blocks to be processed.
Setting the block size control function to Logic 1 defines a 16 pixel
× 16 pixel data block, and Logic 0 defines an 8 pixel × 8 pixel
data block, where one pixel refers to two clock cycles at 27 MHz.
DNR Input Select Control—Subaddress 0xA5, Bits[2:0]
Three bits are assigned to select the filter, which is applied to the
incoming Y data. The signal that lies in the pass band of the
selected filter is the signal that is DNR processed. Figure 80
shows the filter responses selectable with this control.
720 × 485 PIXELS
(NTSC)
APPLY DATA
CORING GAIN
Figure 78. SD DNR Offset Control
Figure 79. SD DNR Border Area
O X X X X X X O O X X X X X X O
O X X X X X X O O X X X X X X O
O X X X X X X O O X X X X X X O
8 × 8 PIXEL BLOCK
APPLY BORDER
CORING GAIN
TWO-PIXEL
BORDER DATA
8 × 8 PIXEL BLOCK
OFFSET CAUSED
BY VARIATIONS IN
INPUT TIMING
Rev. A | Page 67 of
DNR Mode Control—Subaddress 0xA5, Bit 3
This bit controls the DNR mode selected. Logic 0 selects DNR
mode; Logic 1 selects DNR sharpness mode.
DNR works on the principle of defining low amplitude, high
frequency signals as probable noise and subtracting this noise
from the original signal.
In DNR mode, it is possible to subtract a fraction of the signal
that lies below the set threshold, assumed to be noise, from the
original signal. The threshold is set in DNR Register 1.
When DNR sharpness mode is enabled, it is possible to add a
fraction of the signal that lies above the set threshold to the
original signal because this data is assumed to be valid data and
not noise. The overall effect is that the signal is boosted (similar
to using the extended SSAF filter).
DNR Block Offset Control—Subaddress 0xA5, Bits[7:4]
Four bits are assigned to this control, which allows a shift of the
data block of 15 pixels maximum. Consider the coring gain
positions fixed. The block offset shifts the data in steps of one
pixel such that the border coring gain factors can be applied at the
same position regardless of variations in input timing of the data.
SD ACTIVE VIDEO EDGE CONTROL
Subaddress 0x82, Bit 7
The ADV7340/ADV7341 are able to control fast rising and
falling signals at the start and end of active video in order to
minimize ringing.
When the active video edge control feature is enabled
(Subaddress 0x82, Bit 7 = 1), the first three pixels and the last
three pixels of the active video on the luma channel are scaled
so that maximum transitions on these pixels are not possible.
At the start of active video, the first three pixels are multiplied
by 1/8, 1/2, and 7/8, respectively. Approaching the end of active
video, the last three pixels are multiplied by 7/8, 1/2, and 1/8,
respectively. All other active video pixels pass through
unprocessed.
108
1.0
0.8
0.6
0.4
0.2
0
0
FILTER C
FILTER D
1
Figure 80. SD DNR Input Select
2
FREQUENCY (MHz)
FILTER B
3
FILTER A
ADV7340/ADV7341
4
5
6