SAA7129HV1 NXP Semiconductors, SAA7129HV1 Datasheet - Page 6

• Manufacturer Part Number: SAA7129HV1
• Manufacturer: NXP Semiconductors

Specifications of SAA7129HV1

• Adc/dac Resolution: 10b
• Screening Level: Commercial
• Package Type: PQFP
• Pin Count: 44
• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
7. Functional description
9397 750 14325
Product data sheet
The digital video encoder encodes digital luminance and color difference signals into
analog CVBS, S-video and simultaneously RGB or C
SECAM and sub-standards are supported.
Both interlaced and non-interlaced operation is possible for all standards.
The basic encoder function consists of subcarrier generation and color modulation and
insertion of synchronization signals. Luminance and chrominance signals are filtered in
accordance with the standard requirements of RS170A and ITU-R BT.470-3 .
For ease of post analog filtering the signals are twice oversampled with respect to the
pixel clock before digital-to-analog conversion.
The total filter transfer characteristics are illustrated in
Y, C and CVBS are realized with full 10-bit resolution; 9-bit resolution for RGB output. The
C
C
The 8-bit multiplexed C
SAV and EAV codes can be decoded optionally when the device is operated in slave
mode. Two independent data streams can be processed, one latched by the rising edge of
LLC1, the other latched by the falling edge of LLC1. The purpose of that is e.g. to forward
one of the data streams containing both video and On-Screen Display (OSD) information
to the RGB outputs, and the other stream containing video only to the encoded outputs
CVBS and S-video.
For optimum display of RGB signals through a euro-connector TV set, an early composite
sync pulse (up to 31 LLC1 clock periods) can be provided at the CVBS output.
As a further alternative, the VBS and C outputs may provide a second and third CVBS
signal.
It is also possible to connect a Philips digital video decoder (SAA7111A, SAA7113 or
SAA7118) to the SAA7128H; SAA7129H. Via the RTCI pin, connected to RTCO of a
decoder, information concerning actual subcarrier, PAL-ID and definite subcarrier phase
can be inserted.
The device synthesizes all necessary internal signals, color subcarrier frequency and
synchronization signals from that clock.
Wide screen signalling data can be loaded via the I
standards using 50 Hz field rate.
VPS data for program dependent automatic start and stop of such featured VCRs is
loadable via I
The IC also contains closed caption and extended data services encoding (line 21), and
supports anti-taping signal generation in accordance with Macrovision. It is also possible
to load data for copy generation management system into line 20 of every field (525/60
line counting).
A number of possibilities are provided for setting different video parameters, such as:
R
R
-Y-C
-Y-C
B
B
to RGB dematrix can be bypassed optionally in order to provide the upsampled
input signals.
2
C-bus.
Rev. 03 — 9 December 2004
R
-Y-C
B
formats are ITU-R BT.656 (D1 format) compatible, but the
SAA7128H; SAA7129H
2
C-bus and is inserted into line 23 for
R
Figure 8
-Y-C
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
B
signals. NTSC-M, PAL-B/G,
to
Figure
Digital video encoder
13. The DACs for
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