SAA7129HV1 NXP Semiconductors, SAA7129HV1 Datasheet - Page 32

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SAA7129HV1

Manufacturer Part Number
SAA7129HV1
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAA7129HV1

Adc/dac Resolution
10b
Screening Level
Commercial
Package Type
PQFP
Pin Count
44
Lead Free Status / RoHS Status
Compliant
Philips Semiconductors
9397 750 14325
Product data sheet
Table 65:
Table 66:
Table 67:
Table 68:
Table 69:
Bit
7
6
5
4
3
2
1
0
Bit
7 to 0
Bit
7 to 0
Bit
7
6
5
4
3
2
1
0
Bit
7 to 0
Subaddress 72h
Subaddress 73h
Subaddress 74h
Subaddress 75h
Subaddress 76h
Symbol
TTXHS[7:0] start of signal on pin TTXRQ; see
Symbol
TTXHD[7:0] indicates the delay in clock cycles between rising edge of TTXRQ output
Symbol
CSYNCA4
CSYNCA3
CSYNCA2
CSYNCA1
CSYNCA0
VS_S2
VS_S1
VS_S0
Symbol
TTXOVS[7:0] These are the 8 LSBs of the 9-bit code that
Symbol
-
RCV2E10
RCV2E9
RCV2E8
-
RCV2S10
RCV2S9
RCV2S8
Rev. 03 — 9 December 2004
Description
this bit is reserved and must be set to a logic 0
these are the 3 MSBs of end of output signal code; see
this bit is reserved and must be set to a logic 0
these are the 3 MSBs of start of output signal code; see
Description
Description
and valid data at pin TTX:
Description
advanced composite sync against RGB output from 0 to 31 LLC clock
periods
vertical sync shift between RCV1 and RCV2 (switched to output); in
master mode it is possible to shift Hsync (RCV2; CBLF = 0) against
Vsync (RCV1; SRCV11 = 0 and SRCV10 = 0):
Description
determines the first line of occurrence of signal
on pin TTXRQ in odd field. The MSB is held in
subaddress 7Ch; see
PAL: TTXHS[7:0] = 42h
NTSC: TTXHS[7:0] = 54h.
minimum value: TTXHD[7:0] = 2.
Standard value: VS_S[2:0] = 3.
line = (TTXOVS[8:0] + 4) for M-systems
line = (TTXOVS[8:0] + 1) for other systems.
SAA7128H; SAA7129H
Table
75:
Figure
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
23:
Digital video encoder
Remarks
PAL:
TTXOVS = 05h;
NTSC:
TTXOVS = 06h
Table 64
Table 63
32 of 55

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