SAA7118EEB-T NXP Semiconductors, SAA7118EEB-T Datasheet - Page 61

• Manufacturer Part Number: SAA7118EEB-T
• Description: Video ICs COMPONENT VID DECODER W/COMB F
• Manufacturer: NXP Semiconductors
• Type: Multi-Standard Video Decoderr

Specifications of SAA7118EEB-T

• Adc/dac Resolution: 9b
• Screening Level: Commercial
• Package Type: LBGA
• Pin Count: 156
• Maximum Operating Temperature: + 70 C
• Package / Case: SOT-700
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Not Compliant
• Other names: SAA7118E/V1,518

NXP Semiconductors
SAA7118_7
Product data sheet
8.5 VBI data decoder and capture (subaddresses 40h to 7Fh)
The SAA7118 contains a versatile VBI data decoder.
The circuitry recovers the actual clock phase during the clock run-in period, slices the data
bits with the selected data rate, and groups them into bytes. The result is buffered into a
dedicated VBI data FIFO with a capacity of 2
frequency, signal source, field frequency and accepted error count must be defined in
subaddress 40h.
The supported VBI data standards are shown in
For lines 2 to 24 of a field, per VBI line, 1 of 16 standards can be selected (LCR24_[7:0] to
LCR2_[7:0] in 57h[7:0] to 41h[7:0]: 23
The definition for line 24 is valid for the rest of the corresponding field, normally no text
data (video data) should be selected there (LCR24_[7:0] = FFh) to stop the activity of the
VBI data slicer during active video.
To adjust the slicers processing to the input signal source, there are offsets in the
horizontal and vertical direction available: parameters HOFF[10:0] 5Bh[2:0] 59h[7:0],
VOFF[8:0] 5Bh[4] 5Ah[7:0] and FOFF[5Bh[7]].
Contrary to the scalers counting, the slicers offsets define the position of the H and V
trigger events related to the processed video field. The trigger events are the falling edge
of HREF and the falling edge of V123 from the decoder processing part.
The relationship of these programming values to the input signal and the recommended
values are given in
Table 15.
DT[3:0]
62h[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
Standard type
teletext EuroWST, CCST
European closed caption
VPS
wide screen signalling bits 5
US teletext (WST)
US closed caption
(line 21)
(video data selected)
(raw data selected)
teletext
VITC/EBU time codes
(Europe)
VITC/SMPTE time codes
(USA)
reserved
US NABTS
Data types supported by the data slicer block
Figure 30
Rev. 07 — 7 July 2008
and
Multistandard video decoder with adaptive comb filter
Figure
Data rate
(Mbit/s)
6.9375
0.500
5
5.7272
0.503
5
5
6.9375
1.8125
1.7898
5.7272
2
31.
4 bit programming bits).
Framing Code
(FC)
27h
001
9951h
1E 3C1Fh
27h
001
none
none
programmable
programmable
programmable
programmable
56 bytes (2
Table
15.
14 double words). The clock
FC window Hamming
WST625
CC625
VPS
WSS
WST525
CC525
disable
disable
general text
VITC625
VITC525
NABTS
SAA7118
© NXP B.V. 2008. All rights reserved.
check
always
always
optional
optional
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