SAF7118EHV1 NXP Semiconductors, SAF7118EHV1 Datasheet - Page 17

• Manufacturer Part Number: SAF7118EHV1
• Manufacturer: NXP Semiconductors

Specifications of SAF7118EHV1

• Screening Level: Industrial
• Package Type: HBGA
• Pin Count: 156
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
SAF7118_4
Product data sheet
8.1.1.2 Gain control
The gain control circuit receives (via the I
amplifiers or controls one of these amplifiers automatically via a built-in Automatic Gain
Control (AGC) as part of the Analog Input COntrol (AICO).
The AGC for luminance is used to amplify a CVBS or Y signal to the required signal
amplitude, matched to the ADCs input voltage range. Component inputs are gain adjusted
manually at a fixed gain. The AGC active time is the sync bottom of the video signal.
Signal (white) peak control limits the gain at signal overshoots. The flow charts
(see
voltage variation within the specified range is automatically eliminated by clamp and
automatic gain control.
Fig 7.
Fig 8.
Figure 9
Analog line with clamp (HCL) and gain range (HSY)
Automatic gain range
and
Figure
(1 V (p-p) 18/56 )
Rev. 04 — 4 July 2008
10) show more details of the AGC. The influence of supply
511
120
1
Multistandard video decoder with adaptive comb filter
analog input level
0 dB
3 dB
6 dB
analog line blanking
maximum
minimum
GAIN
HSY
2
range 9 dB
C-bus) the static gain levels for the four analog
CLAMP
TV line
HCL
ADC input level
mhb325
controlled
mhb726
0 dB
SAF7118
© NXP B.V. 2008. All rights reserved.
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