SAF7118EH/V1/G-T NXP Semiconductors, SAF7118EH/V1/G-T Datasheet - Page 82
SAF7118EH/V1/G-T
Manufacturer Part Number
SAF7118EH/V1/G-T
Description
Video ICs 9BIT VIDEO DECODER
Manufacturer
NXP Semiconductors
Datasheet
1.SAF7118EHV1G-T.pdf
(175 pages)
Specifications of SAF7118EH/V1/G-T
Screening Level
Industrial
Package Type
HBGA
Pin Count
156
Lead Free Status / RoHS Status
Compliant
Other names
SAF7118EH/V1/G,518
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10. I
Table 35.
[1]
SAF7118_4
Product data sheet
Code
S
Sr
SLAVE ADDRESS W
SLAVE ADDRESS R
ACK-s
ACK-m
SUBADDRESS
DATA
P
Fig 49. I
If pin RTCO strapped to supply voltage via a 3.3 k resistor.
a. Write procedure.
b. Read procedure (combined).
2
C-bus description
S
2
C-bus format
Description of I
10.1 I
SLAVE ADDRESS W
The SAF7118 supports the ‘fast mode’ I
400 kbit/s).
Description
START condition
repeated START condition
0100 0010 (42h, default) or 0100 0000 (40h)
0100 0011 (43h, default) or 0100 0001 (41h)
acknowledge generated by the slave
acknowledge generated by the master
subaddress byte; see
data byte; see
automatically incremented
STOP condition
2
Sr
S
C-bus format
2
C-bus format
SLAVE ADDRESS W
SLAVE ADDRESS R
ACK-s
Table
37; if more than one byte DATA is transmitted the subaddress pointer is
Table 36
Rev. 04 — 4 July 2008
SUBADDRESS
ACK-s
ACK-s
and
Multistandard video decoder with adaptive comb filter
Table 37
SUBADDRESS
(n bytes + acknowledge)
2
[1]
[1]
C-bus specification extension (data rate up to
ACK-s
DATA
data transferred
(n bytes + acknowledge)
ACK-m
ACK-s
DATA
data transferred
mhb340
P
SAF7118
© NXP B.V. 2008. All rights reserved.
ACK-s
mhb339
P
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