SAF7118EH/V1/G-T NXP Semiconductors, SAF7118EH/V1/G-T Datasheet - Page 170
SAF7118EH/V1/G-T
Manufacturer Part Number
SAF7118EH/V1/G-T
Description
Video ICs 9BIT VIDEO DECODER
Manufacturer
NXP Semiconductors
Datasheet
1.SAF7118EHV1G-T.pdf
(175 pages)
Specifications of SAF7118EH/V1/G-T
Screening Level
Industrial
Package Type
HBGA
Pin Count
156
Lead Free Status / RoHS Status
Compliant
Other names
SAF7118EH/V1/G,518
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20. Abbreviations
SAF7118_4
Product data sheet
19.7 Issue 7: NTSC-Japan offset compensation does not work as specified
in Y/C mode
Background (how it should work):
The difference between NTSC M and NTSC-Japan is the non-existing 7.5 IRE offset in
Japan. The offset should automatically change by setting the preferred standard to
NTSC-Japan instead of NTSC M via CSTD[2:0] = 100.
Anomaly description:
The offset adaption does not work in Y/C mode (BYPS = 1), however it does work in
CVBS mode.
Impact:
The picture is too dark and picture content below +5 IRE is limited.
Workaround:
Table 153. Register setting
Table 154. Abbreviations
Line control register
LCR22
LCR23
LCR24
RAWG[7:0]
RAWO[7:0]
Acronym
AV
CIF
CMOS
CVBS
DB
DR
DVD
EAV
FIFO
FIR
1. Set decoder brightness (DBRI[7:0]) to 80h (drawback: ‘super black levels’ below
2. Set decoder to raw data mode by the LCRn registers and use RAWO[7:0] and
or
RAWG[7:0] to adapt the levels
For detail see
3 IRE are clipped)
Description
Audio Video
Common Intermediate Format
Complementary Metal-Oxide Semiconductor
Color Video Blanking Signal
Difference Blue
Difference Red
Digital Versatile Disc
End of Active Video
First In First Out
Finite Impulse Response
Table
Rev. 04 — 4 July 2008
153.
Multistandard video decoder with adaptive comb filter
Subaddress
55h
56h
57h
18h
19h
SAF7118
© NXP B.V. 2008. All rights reserved.
Value
DDh
DDh
DDh
66h
77h
170 of 175
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