AM79C973BKD AMD (ADVANCED MICRO DEVICES), AM79C973BKD Datasheet - Page 164

• Manufacturer Part Number: AM79C973BKD
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C973BKD

• Lead Free Status / RoHS Status: Compliant

2
1
0
BCR4: LED 0 Status
BCR4 controls the function(s) that the LED0 pin dis-
plays. Multiple functions can be simultaneously en-
abled on this LED pin. The LED display will indicate the
logical OR of the enabled functions. BCR4 defaults to
Link Status (LNKST) with pulse stretcher enabled
(PSE = 1) and is fully programmable.
Note: When LEDPE (BCR2, bit 12) is set to 1, pro-
gramming of the LED0 Status register is enabled.
When LEDPE is cleared to 0, programming of the
LED0 register is disabled. Writes to those registers will
be ignored.
164
SLEEP_SFEX
I2C_N1
I2C_N0
See the section on External Ad-
dress Detection for more details.
Setting this bit will reduce the
power consumption of the inter-
nal PHY substantially.
Read/Write accessible always.
SLEEP_SFEX is cleared to 0 by
H_RESET and is unaffected by
S_RESET or by setting the STOP
bit.
(Am79C975 only). This bit is used
to set the operating frequency of
the SMIU core. It represents the
value in the D1 bit position (see
Appendix B on SMIU Bus Fre-
quency.
Read/Write accessible always.
I2C_N1 is cleared by H_RESET
and is unaffected by S_RESET or
by setting the STOP bit.
(Am79C975 only). This bit is used
to set the operating frequency of
the SMIU core. It represents the
value in the D0 bit position (see
Appendix B on SMIU Bus Fre-
quency.
Read/Write accessible always.
I2C_N0 is cleared by H_RESET
and is unaffected by S_RESET or
by setting the STOP bit.
Read/Write accessible always.
EADISEL
H_RESET and is unaffected by
S_RESET or by setting the STOP
bit.
is
cleared
P R E L I M I N A R Y
Am79C973/Am79C975
by
Note: Bits 15-0 in this register are programmable
through the EEPROM.
Bit
31-16 RES
15
14
LEDOUT
LEDPOL
Name
This bit indicates the current
Reserved locations. Written as
zeros and read as undefined.
(non-stretched) value of the LED
output pin. A value of 1 in this bit
indicates that the OR of the en-
abled signals is true.
The logical value of the LEDOUT
status signal is determined by the
settings of the individual Status
Enable bits of the LED register
(bits 8 and 6-0).
Read accessible always. This bit
is read only; writes have no ef-
fect. LEDOUT is unaffected by
H_RESET, S_RESET, or STOP.
LED Polarity. When this bit has
the value 0, then the LED pin will
be driven to a LOW level whenev-
er the OR of the enabled signals
is true, and the LED pin will be
disabled and allowed to float high
whenever the OR of the enabled
signals is false (i.e., the LED out-
put will be an Open Drain output
and the output value will be the
inverse of the LEDOUT status
bit).
When this bit has the value 1,
then the LED pin will be driven to
a HIGH level whenever the OR of
the enabled signals is true, and
the LED pin will be driven to a
LOW level whenever the OR of
the enabled signals is false (i.e.,
the LED output will be a Totem
Pole output and the output value
will be the same polarity as the
LEDOUT status bit.).
The setting of this bit will not ef-
fect the polarity of the LEDOUT
bit for this register.
Read/Write accessible always.
LEDPOL is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
Description