S2004TB Applied Micro Circuits Corporation, S2004TB Datasheet - Page 8

• Manufacturer Part Number: S2004TB
• Manufacturer: Applied Micro Circuits Corporation

Specifications of S2004TB

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.13V
• Operating Supply Voltage (max): 3.47V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 208
• Lead Free Status / RoHS Status: Not Compliant

In order to provide interface compatibility to non-
AMCC serial backplane transceivers, the S2004 can
also generate a unique sync character consisting of
16 consecutive K28.5 characters. This event is initi-
ated by the simultaneous assertion of SYNC and
DN. The SYNC character may start with either a
positive or negative parity K28.5. (Depending on the
current running disparity.) The parity of the second
and third K28.5 are inverse with respect to a valid
8B/10B sequence. Parity of the remaining K28.5 are
8B/10B compliant. Thus the parity of the K28.5 pat-
tern consists of + + - - + - + - + - + - + - + - or - - + + -
+ - + - + - + - + - +.
When operating in the channel locked mode, the
KGENx and DNx inputs must be driven for each
channel. The SYNC input is common to all four
8
S2004
Table 2. Transmitter Control Signals
S
Y
0
0
0
1
N
C
K
G
X
0
0
1
E
N
x
D
N
0
1
1
1
x
E
K
K
D
S
a
n
n
2
p
N I
C
d
c
8
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o
h
7 [
5 .
c
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d
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0 :
e
a r
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C
d
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e
1
h
t c
s t
channels. Table 2 identifies the S2004 transmit con-
trol signals.
The special SYNC generation commences on the first
cycle in which SYNC and DN=1 and continues for 16
cycles. During this period, the SYNC, KGEN, and DN
inputs are ignored (assertion of DN and SYNC during
this period will not prolong or re-initialize the special
sync character generation).
Frequency Synthesizer (PLL)
The S2004 synthesizes a serial transmit clock from
the reference signal. Upon startup, the S2004 will
obtain phase and frequency lock within 2500 bit
times after the start of receiving reference clock in-
puts. Reliable locking of the transmit PLL is assured,
but a lock-detect output is NOT provided.
6
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QUAD SERIAL BACKPLANE DEVICE
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October 10, 2000 / Revision D
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