PCA8565BS/1-T NXP Semiconductors, PCA8565BS/1-T Datasheet - Page 20

• Manufacturer Part Number: PCA8565BS/1-T
• Description: Real Time Clock AUTOMOTIVE CLOCK/CAL
• Manufacturer: NXP Semiconductors

Specifications of PCA8565BS/1-T

• Bus Type: Serial (2-Wire, I2C)
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 1.8V
• Operating Temperature (min): -40C
• Pin Count: 10
• Mounting: Surface Mount
• Date Format: DW:DM:M:Y
• Time Format: HH:MM:SS
• Mounting Style: SMD/SMT
• Package / Case: HVSON
• Lead Free Status / RoHS Status: Compliant
• Other names: PCA8565BS/1,118

NXP Semiconductors
PCA8565_2
Product data sheet
Fig 12. POR override sequence
SDA
SCL
power up
9.13 Power-On Reset (POR) override
8 ms
The first increment of the time circuits is between 0.507813 s and 0.507935 s after STOP
bit is released. The uncertainty is caused by the prescaler bits F
(see
The POR duration is directly related to the crystal oscillator start-up time. Due to the long
start-up times experienced by these types of circuits, a mechanism has been built in to
disable the POR and hence speed up on-board test of the device. The setting of this mode
requires that the I
Figure
Once the override mode has been entered, the device immediately stops being reset and
normal operation may commence i.e. entry into the EXT_CLK test mode via I
access. The override mode may be cleared by writing a logic 0 to TESTC. TESTC must be
set to logic 1 before re-entry into the override mode is possible. Setting TESTC to logic 0
during normal operation has no effect except to prevent entry into the POR override mode.
Table
12. All timings are required minimums.
500 ns
28) and the unknown state of the 32 kHz clock.
2
C-bus pins, SDA and SCL, be toggled in a specific order as shown in
Rev. 02 — 16 June 2009
2000 ns
override active
Real time clock/calendar
0
and F
PCA8565
© NXP B.V. 2009. All rights reserved.
1
not being reset
mgm664
2
C-bus
20 of 39