XR16L570IL24-F Exar Corporation, XR16L570IL24-F Datasheet - Page 31

• Manufacturer Part Number: XR16L570IL24-F
• Description: 2.25 To 5.5V W/ 5V TOLERANT INPUT UART W/16 BYTE FIFO W/ POWER SAVE
• Manufacturer: Exar Corporation

Specifications of XR16L570IL24-F

• Features: *
• Number Of Channels: 1, UART
• Fifo's: 16 Byte
• Protocol: RS232, RS422
• Voltage - Supply: 1.62 V ~ 5.5 V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Package / Case: 24-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. 1.0.1
MSR[3]: Delta CD# Input Flag
Since the 24-QFN package of the L570 does not have the CD# modem input, this bit has functionality only in
internal loopback mode when the CD bit (MSR[7]) can be controlled via the OP2# bit (MCR[3]).
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•
MSR[4]: CTS Input Status
CTS# pin may function as automatic hardware flow control signal input if it is enabled and selected by Auto
CTS (EFR bit-7). Auto CTS flow control allows starting and stopping of local data transmissions based on the
modem CTS# signal. A logic 1 on the CTS# pin will stop UART transmitter as soon as the current character
has finished transmission, and a logic 0 will resume data transmission. Normally MSR bit-4 bit is the
complement of the CTS# input. However in the loopback mode, this bit is equivalent to the RTS# bit in the
MCR register. The CTS# input may be used as a general purpose input when the modem interface is not used.
MSR[5]: DSR Input Status
Normally MSR bit-5 is the complement of the DSR# input in the 32-QFN package. In internal loopback mode,
this bit is equivalent to the DTR# bit (MCR[0]). The 24-QFN package of the L570 does not have the DSR#
modem input.
MSR[6]: RI Input Status
Normally MSR bit-6 is the complement of the RI# input in the 32-QFN package. In internal loopback mode, this
bit is equivalent to the OP1# bit (MCR[2]). The 24-QFN package of the L570 does not have the RI# modem
input.
MSR[7]: CD Input Status
Normally MSR bit-5 is the complement of the CD# input in the 32-QFN package. In internal loopback mode,
this bit is equivalent to the OP2# bit (MCR[3]). The 24-QFN package of the L570 does not have the CD#
modem input.
This is a 8-bit general purpose register for the user to store temporary data. The content of this register is
preserved during sleep mode but becomes 0xFF (default) after a reset or a power off-on cycle.
The concatenation of the contents of DLM and DLL gives the 16-bit divisor value which is used to calculate the
baud rate:
•
See MCR bit-7 and the baud rate table also.
This register contains the device ID (0x01 for XR16L570). Prior to reading this register, DLL and DLM should
be set to 0x00.
This register contains the device revision information. For example, 0x01 means revision A. Prior to reading
this register, DLL and DLM should be set to 0x00.
4.11
4.12
4.13
4.14
Logic 0 = No change on CD# input (default).
Logic 1 = Indicates that the CD# input has changed state since the last time it was monitored. A modem
status interrupt will be generated if MSR interrupt is enabled (IER bit-3).
Baud Rate = (Clock Frequency / 16) / Divisor
Scratchpad Register (SPR) - Read/Write
Baud Rate Generator Registers (DLL and DLM) - Read/Write
Device Identification Register (DVID) - Read Only
Device Revision Register (DREV) - Read Only
SMALLEST 1.62V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE
31
XR16L570