STM8AF6246TCSSSY STMicroelectronics, STM8AF6246TCSSSY Datasheet - Page 26
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STM8AF6246TCSSSY
Manufacturer Part Number
STM8AF6246TCSSSY
Description
8 BITS MICROCONTR
Manufacturer
STMicroelectronics
Series
STM8Ar
Datasheet
1.STM8AF5289TCY.pdf
(106 pages)
Specifications of STM8AF6246TCSSSY
Core Processor
STM8A
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
32-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM8AF6246TCSSSY
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
STM8AF6246TCSSSY
Manufacturer:
ST
Quantity:
20 000
Product overview
5.9.5
5.10
26/106
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Controller area network interface (beCAN)
The beCAN controller (basic enhanced CAN), interfaces the CAN network and supports the
CAN protocol version 2.0A and B. It is equipped with a receive FIFO and a very versatile
filter bank. Together with a filter match index, this allows a very efficient message handling in
today’s car network architectures. The CPU is significantly unloaded. The maximum
transmission speed is 1 Mbit/s.
Transmission
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Reception
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Interrupt management
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Input/output specifications
The product features four I/O types:
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To decrease EMI (electromagnetic interference), high sink I/Os have a limited maximum
slew rate. The rise and fall times are similar to those of standard I/Os.
Interrupt:
–
–
–
Wakeup from Halt on address detection in slave mode
Three transmit mailboxes
Configurable transmit priority by identifier or order request
11- and 29-bit ID
1 receive FIFO (3 messages deep)
Software-efficient mailbox mapping at a unique address space
FMI (filter match index) stored with message for quick message association
Configurable FIFO overrun
Time stamp on SOF reception
6 filter banks, 2 x 32 bytes (scalable to 4 x 16-bit) each, enabling various masking
configurations, such as 12 filters for 29-bit ID or 48 filters for 11-bit ID.
Filtering modes (mixable):
–
–
Maskable interrupt
Software-efficient mailbox mapping at a unique address space
Standard I/O 2 MHz
Fast I/O up to 10 MHz
High sink 8 mA, 2 MHz
True open drain (I
Successful address/data communication
Error condition
Wakeup from Halt
Mask mode permitting ID range filtering
ID list mode
2
C interface)
Doc ID 14395 Rev 8
STM8AF52/62xx, STM8AF51/61xx