PIC16LF1847-E/ML Microchip Technology, PIC16LF1847-E/ML Datasheet - Page 211
![14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan](/photos/40/79/407995/pdip18_sml.jpg)
PIC16LF1847-E/ML
Manufacturer Part Number
PIC16LF1847-E/ML
Description
14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan
Manufacturer
Microchip Technology
Series
PIC® XLP™ mTouch™ 16Fr
Datasheet
1.PIC16F1847-EP.pdf
(408 pages)
Specifications of PIC16LF1847-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad
Core
PIC
Processor Series
PIC16LF
Data Bus Width
8 bit
Maximum Clock Frequency
32 MHz
Data Ram Size
256 B
Number Of Programmable I/os
15
Number Of Timers
ÿ4 x 8-bit, 1 x 16-bit
Operating Supply Voltage
1.8 V to 5.5 V
Mounting Style
Through Hole
Interface Type
SPI, I2C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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24.3.2
The following steps should be taken when configuring
the CCP module for standard PWM operation:
1.
2.
3.
4.
5.
6.
24.3.3
The PWM standard mode makes use of one of the 8-bit
Timer2/4/6 timer resources to specify the PWM period.
Configuring the CxTSEL<1:0> bits in the CCPTMRS
register selects which Timer2/4/6 timer is used.
24.3.4
The PWM period is specified by the PRx register of
Timer2/4/6. The PWM period can be calculated using
the formula of
EQUATION 24-1:
2011 Microchip Technology Inc.
Note:
Disable the CCPx pin output driver by setting the
associated TRIS bit.
Load the PRx register with the PWM period
value.
Configure the CCP module for the PWM mode
by loading the CCPxCON register with the
appropriate values.
Load the CCPRxL register and the DCxBx bits
of the CCPxCON register, with the PWM duty
cycle value.
Configure and start Timer2/4/6:
• Select the Timer2/4/6 resource to be used
• Clear the TMRxIF interrupt flag bit of the
• Configure the TxCKPS bits of the TxCON
• Enable the Timer by setting the TMRxON
Enable PWM output pin:
• Wait until the Timer overflows and the
• Enable the CCPx pin output driver by clear-
Note 1:
PWM Period
for PWM generation by setting the
CxTSEL<1:0> bits in the CCPTMRS
register.
PIRx register. See Note below.
register with the Timer prescale value.
bit of the TxCON register.
TMRxIF bit of the PIRx register is set. See
Note below.
ing the associated TRIS bit.
SETUP FOR PWM OPERATION
In order to send a complete duty cycle and
period on the first PWM output, the above
steps must be included in the setup
sequence. If it is not critical to start with a
complete PWM signal on the first output,
then step 6 may be ignored.
TIMER2/4/6 TIMER RESOURCE
PWM PERIOD
Equation
T
OSC
=
(TMRx Prescale Value)
PWM PERIOD
= 1/F
PRx
24-1.
OSC
+
1
4 T
OSC
Preliminary
When TMRx is equal to PRx, the following three events
occur on the next increment cycle:
• TMRx is cleared
• The CCPx pin is set. (Exception: If the PWM duty
• The PWM duty cycle is latched from CCPRxL into
24.3.5
The PWM duty cycle is specified by writing a 10-bit
value to multiple registers: CCPRxL register and
DCxB<1:0> bits of the CCPxCON register. The
CCPRxL contains the eight MSbs and the DCxB<1:0>
bits of the CCPxCON register contain the two LSbs.
CCPRxL and DCxB<1:0> bits of the CCPxCON
register can be written to at any time. The duty cycle
value is not latched into CCPRxH until after the period
completes (i.e., a match between PRx and TMRx
registers occurs). While using the PWM, the CCPRxH
register is read-only.
Equation 24-2
width.
Equation 24-3
ratio.
EQUATION 24-2:
EQUATION 24-3:
The CCPRxH register and a 2-bit internal latch are
used to double buffer the PWM duty cycle. This double
buffering is essential for glitchless PWM operation.
The 8-bit timer TMRx register is concatenated with either
the 2-bit internal system clock (F
prescaler, to create the 10-bit time base. The system
clock is used if the Timer2/4/6 prescaler is set to 1:1.
When the 10-bit time base matches the CCPRxH and
2-bit latch, then the CCPx pin is cleared (see
Figure
cycle = 0%, the pin will not be set.)
CCPRxH.
Note:
Duty Cycle Ratio
Pulse Width
24-4).
The Timer postscaler (see
“Timer2/4/6
the determination of the PWM frequency.
PWM DUTY CYCLE
is used to calculate the PWM duty cycle
is used to calculate the PWM pulse
PIC16(L)F1847
=
T
=
CCPRxL:CCPxCON<5:4>
OSC
PULSE WIDTH
DUTY CYCLE RATIO
---------------------------------------------------------------------- -
CCPRxL:CCPxCON<5:4>
Operation”) is not used in
(TMRx Prescale Value)
4 PRx
OSC
DS41453B-page 211
), or 2 bits of the
+
1
Section 22.1
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