PIC16LF1847-E/ML Microchip Technology, PIC16LF1847-E/ML Datasheet - Page 195
![14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan](/photos/40/79/407995/pdip18_sml.jpg)
PIC16LF1847-E/ML
Manufacturer Part Number
PIC16LF1847-E/ML
Description
14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan
Manufacturer
Microchip Technology
Series
PIC® XLP™ mTouch™ 16Fr
Datasheet
1.PIC16F1847-EP.pdf
(408 pages)
Specifications of PIC16LF1847-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad
Core
PIC
Processor Series
PIC16LF
Data Bus Width
8 bit
Maximum Clock Frequency
32 MHz
Data Ram Size
256 B
Number Of Programmable I/os
15
Number Of Timers
ÿ4 x 8-bit, 1 x 16-bit
Operating Supply Voltage
1.8 V to 5.5 V
Mounting Style
Through Hole
Interface Type
SPI, I2C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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23.0
The Data Signal Modulator (DSM) is a peripheral which
allows the user to mix a data stream, also known as a
modulator signal, with a carrier signal to produce a
modulated output.
Both the carrier and the modulator signals are supplied
to the DSM module either internally, from the output of
a peripheral, or externally through an input pin.
The modulated output signal is generated by perform-
ing a logical “AND” operation of both the carrier and
modulator signals and then provided to the MDOUT pin.
The carrier signal is comprised of two distinct and sep-
arate signals. A carrier high (CARH) signal and a car-
rier low (CARL) signal. During the time in which the
modulator (MOD) signal is in a logic high state, the
DSM mixes the carrier high signal with the modulator
signal. When the modulator signal is in a logic low
state, the DSM mixes the carrier low signal with the
modulator signal.
FIGURE 23-1:
2011 Microchip Technology Inc.
Comparator C1
Comparator C2
MSSP1 SDO1
MSSP2 SDO2
MDCL<3:0>
DATA SIGNAL MODULATOR
MDCH<3:0>
MDMS<3:0>
No Channel
No Channel
No Channel
MDCIN1
MDCIN2
MDCIN1
MDCIN2
Reserved
Reserved
Reserved
MDMIN
Selected
Selected
Selected
MDBIT
CLKR
CCP1
CCP2
CCP3
CCP4
CCP1
CCP2
CCP3
CCP4
CLKR
CCP1
CCP2
CCP3
CCP4
V
V
TX
SS
SS
SIMPLIFIED BLOCK DIAGRAM OF THE DATA SIGNAL MODULATOR
0000
0001
0010
0011
0100
0000
0001
0010
0011
0100
*
*
0000
0001
0010
0011
0100
0101
0110
0111
1000
*
*
1111
0101
0110
0111
1000
1001
1010
1011
1111
0101
0110
0111
1000
*
*
1111
CARH
MOD
CARL
MDCHPOL
MDCLPOL
MDEN
EN
Preliminary
D
D
SYNC
SYNC
Data Signal
Modulator
Q
Q
MDCLSYNC
Using this method, the DSM can generate the following
types of Key Modulation schemes:
• Frequency-Shift Keying (FSK)
• Phase-Shift Keying (PSK)
• On-Off Keying (OOK)
Additionally, the following features are provided within
the DSM module:
• Carrier Synchronization
• Carrier Source Polarity Select
• Carrier Source Pin Disable
• Programmable Modulator Data
• Modulator Source Pin Disable
• Modulated Output Polarity Select
• Slew Rate Control
Figure 23-1
Data Signal Modulator peripheral.
MDCHSYNC
1
0
1
0
shows a Simplified Block Diagram of the
PIC16(L)F1847
MDOPOL
MDOE
DS41453B-page 195
MDOUT
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