PIC16F1847-I/SO Microchip Technology, PIC16F1847-I/SO Datasheet - Page 286

• Manufacturer Part Number: PIC16F1847-I/SO
• Description: 14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core 18 S
• Manufacturer: Microchip Technology

Specifications of PIC16F1847-I/SO

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16(L)F1847
REGISTER 25-5:
REGISTER 25-6:
DS41453A-page 286
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-1
bit 0
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
Master mode:
bit 7-0
10-Bit Slave mode — Most Significant Address byte:
bit 7-3
bit 2-1
bit 0
10-Bit Slave mode — Least Significant Address byte:
bit 7-0
7-Bit Slave mode:
bit 7-1
bit 0
R/W-1/1
R/W-0/0
ADD<7:0>: Baud Rate Clock Divider bits
SCLx pin clock period = ((ADD<7:0> + 1) *4)/F
Not used: Unused for Most Significant Address byte. Bit state of this register is a “don’t care”. Bit pat-
tern sent by master is fixed by I
compared by hardware and are not affected by the value in this register.
ADD<2:1>: Two Most Significant bits of 10-bit address
Not used: Unused in this mode. Bit state is a “don’t care”.
ADD<7:0>: Eight Least Significant bits of 10-bit address
ADD<7:1>: 7-bit address
Not used: Unused in this mode. Bit state is a “don’t care”.
MSK<7:1>: Mask bits
1 = The received address bit n is compared to SSPxADD<n> to detect I
0 = The received address bit n is not used to detect I
MSK<0>: Mask bit for I
I
1 = The received address bit 0 is compared to SSPxADD<0> to detect I
0 = The received address bit 0 is not used to detect I
I
2
2
C Slave mode, 10-bit address (SSPM<3:0> = 0111 or 1111):
C Slave mode, 7-bit address, the bit is ignored
R/W-0/0
R/W-1/1
SSPxMSK: SSPx MASK REGISTER
SSPxADD: MSSPx ADDRESS AND BAUD RATE REGISTER (I
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-0/0
R/W-1/1
2
C Slave mode, 10-bit Address
2
C specification and must be equal to ‘11110’. However, those bits are
R/W-1/1
R/W-0/0
Preliminary
ADD<7:0>
MSK<7:0>
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-1/1
R/W-0/0
OSC
2
2
C address match
C address match
R/W-1/1
R/W-0/0
 2011 Microchip Technology Inc.
2
2
C address match
C address match
R/W-0/0
R/W-1/1
2
C MODE)
R/W-0/0
R/W-1/1
bit 0
bit 0