PIC16F1507-E/ML Microchip Technology, PIC16F1507-E/ML Datasheet - Page 100
![3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 QFN 4x4mm TUBE](/photos/16/3/160361/qfn20_sml.jpg)
PIC16F1507-E/ML
Manufacturer Part Number
PIC16F1507-E/ML
Description
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 QFN 4x4mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F1507-EML.pdf
(266 pages)
2.PIC16F1507-EML.pdf
(26 pages)
3.PIC16F1507-EML.pdf
(40 pages)
Specifications of PIC16F1507-E/ML
Processor Series
PIC16
Core
PIC16F
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
3.5 KB
Data Ram Size
128 B
Interface Type
ICSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
3
Operating Supply Voltage
2.3 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
QFN-20
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 125 C
Supply Current (max)
30 uA
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
-
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Eeprom Size
-
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
Details
- Current page: 100 of 266
- Download datasheet (3Mb)
11.1
The Alternate Pin Function Control register is used to
steer specific peripheral input and output functions
between different pins. The APFCON register is shown
in
functions can be moved between different pins.
• CLC1
• NCO1
These bits have no effect on the values of any TRIS
register. PORT and TRIS overrides will be routed to the
correct pin. The unselected pin will be unaffected.
REGISTER 11-1:
2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-2
bit 1
bit 0
Register
U-0
—
Alternate Pin Function
11-1. For this device family, the following
Unimplemented: Read as ‘0’
CLC1SEL: Pin Selection bit
1 = CLC1 function is on RC5
0 = CLC1 function is on RA2
NCO1SEL: Pin Selection bit
1 = NCO1 function is on RC6
0 = NCO1 function is on RC1
U-0
—
APFCON: ALTERNATE PIN FUNCTION CONTROL REGISTER
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U-0
—
U-0
—
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U-0
—
U-0
PIC16(L)F1507
—
CLC1SEL
R/W-0/0
DS41586A-page 100
NCO1SEL
R/W-0/0
bit 0
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