82V1074PF8 IDT, Integrated Device Technology Inc, 82V1074PF8 Datasheet - Page 80
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82V1074PF8
Manufacturer Part Number
82V1074PF8
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.82V1074PF8.pdf
(107 pages)
Specifications of 82V1074PF8
Number Of Channels
4
On-hook Transmission
Yes
Polarity Reversal
Yes
On-chip Ring Relay Driver
Yes
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TQFP
Operating Temperature Classification
Industrial
Pin Count
100
Mounting
Surface Mount
Operating Current
95mA
Operating Supply Voltage (max)
3.465V
Operating Supply Voltage (min)
3.135V
Lead Free Status / RoHS Status
Not Compliant
RSLIC & CODEC CHIPSET
LREG18: Interrupt Mask Register, Read/Write (11H/91H)
LREG19: IO Interrupt Mask Register, Read/Write (12H/92H)
GK_M
HK_M
OTMP_M
RAMP_M
GKP_M
REV_POL
SYNC_EN
IO_M[3:0]
Command
Command
I/O data
I/O data
Mask bit for the ground-key status bits GK[3:0] in GREG26
GK_M = 0:
GK_M = 1:
Mask bit for the off-hook status bits HK[3:0] in GREG26
HK_M = 0:
HK_M = 1:
Mask bit for the over temperature status bit OTMP in LREG21
OTMP_M = 0:
OTMP_M = 1:
Mask bit for the RAMP_OK bit in LREG21
RAMP_M = 0:
RAMP_M = 1:
Mask bit for the GK_POL bit in LREG21
GKP_M = 0:
GKP_M = 1:
Reverse the polarity of DC feeding
REV_POL = 0:
REV_POL = 1:
Enable synchronous ringing for external ringing mode.
SYNC_EN = 0:
SYNC_EN = 1:
Mask bits for the IO status bits IO[3:0] in register LREG19 when the IO pins are configured as inputs.
IO_M[3] = 0:
IO_M[3] = 1:
IO_M[2] = 0:
IO_M[2] = 1:
IO_M[1] = 0:
IO_M[1] = 1:
IO_M[0] = 0:
IO_M[0] = 1:
R/W
R/W
b7
b7
Reserved
Reserved
b6
b6
0
0
Each change of the GK[3:0] bits generates an interrupt;
Changes of the GK[3:0] bits do not generate interrupts (default).
Each change of the HK[3:0] bits generates an interrupt;
Changes of the HK[3:0] bits do not generate interrupts (default).
Changes of the OTMP bit from 0 to 1 generate interrupts;
Changes of the OTMP bit from 0 to 1 do not generate interrupts (default).
Changes of the RAMP_OK bit from 0 to 1 generate interrupts;
Changes of the RAMP_OK bit from 0 to 1 do not generate interrupt (default).
Each change of the GK_POL bit generates an interrupt;
Changes of the GK_POL bit do not generate interrupts (default).
Normal polarity (default);
Reverse polarity.
Asynchronous external ringing is selected (default);
External ringing with zero-crossing is selected;
Each change of the IO[3] bit generates an interrupt;
Changes of the IO[3] bit do not generate interrupts (default).
Each change of the IO[2] bit generates an interrupt;
Changes of the IO[2] bit do not generate interrupts (default).
Each change of the IO[1] bit generates an interrupt;
Changes of the IO[1] bit do not generate interrupts (default).
Each change of the IO[0] bit generates an interrupt;
Changes of the IO[0] bit do not generate interrupts (default).
REV_POL
b5
b5
0
0
SYNC_EN
GK_M
80
b4
b4
1
1
IO_M[3]
HK_M
b3
b3
0
0
OTMP_M
IO_M[2]
b2
b2
0
0
IDT82V1671/IDT82V1671A, IDT82V1074
RAMP_M
IO_M[1]
b1
b1
0
1
GKP_M
IO_M[0]
b0
b0
1
0