PEB3264F-V1.4 Infineon Technologies, PEB3264F-V1.4 Datasheet - Page 286

• Manufacturer Part Number: PEB3264F-V1.4
• Manufacturer: Infineon Technologies

Specifications of PEB3264F-V1.4

• Lead Free Status / RoHS Status: Not Compliant

Preliminary
Bit
DUP[3:0]
DUP-IO[3:0]
Data Sheet
14
H
IOCTL3
7
DUP[3:0] HOOK
0000
0001
...
1111
1)
Data Upstream Persistence Counter end value. Restricts the rate
of interrupts generated by the HOOK bit in the interrupt register
INTREG1. The interval is programmable from 1 to 16 ms in steps
of 1 ms (reset value is 10 ms).
The DUP[3:0] value affects the blocking period for ground key
detection (see
Data Upstream Persistence Counter end value for
• the IO pins when used as digital input pins.
• the bits ICON and VRTLIM in register INTREG1.
The interval is programmable from 0.5 to 60.5 ms in steps of 4 ms
(reset value is 16.5 ms).
6
IO Control Register 3
Minimum frequency for AC suppression.
DUP[3:0]
Active,
Ringing
1
2
16
5
SLICOFI-2x Command Structure and Programming
Chapter
4
286
3.6).
HOOK
Power
Down
2 ms
4 ms
32 ms
3
GNDK
4 ms
8 ms
64 ms
DUP-IO[3:0]
2
94
H
DuSLIC-S/-S2
1
GNDK
f
125 Hz
62.5 Hz
7.8125 Hz
min,ACsup
2000-07-14
0
Y
1)