EGLXT973QEA3V Intel, EGLXT973QEA3V Datasheet - Page 6

• Manufacturer Part Number: EGLXT973QEA3V
• Manufacturer: Intel

Specifications of EGLXT973QEA3V

• Lead Free Status / RoHS Status: Compliant

LXT973 PHY Transceiver
Specification Update
249737, Revision 10.0
20 March 2007
3.0
3.1
3.1.1
3.1.2
3.1.3
3.2
Cortina Systems
Summary Table of Changes
The following table indicates the errata, specification changes, specification clarifications,
or documentation changes which apply to the LXT973 PHY Transceiver.
Cortina Systems, Inc.
component, and account for the other outstanding issues through documentation or
specification changes as noted. This table uses the following notations:
Codes Used in Summary Table
Stepping
X:
(No mark) or
(Blank box):
Page
(Page):
Status
Doc:
PlanFix:
Fixed:
NoFix:
Errata (Sheet 1 of 2)
®
LXT973 10/100 Mbps Dual-Port Fast Ethernet PHY Transceiver
No.
1
2
3
4
5
6
7
Steppings
X
X
X
X
1
X
X
X
2
X
X
X
X
Errata exists in the stepping indicated. Specification Change, or
Specification Clarification applies to this stepping.
This erratum is fixed in stepping indicated. Specification Change, or
Specification Clarification does not apply to this stepping.
Page location of item in this document.
Document change or update will be implemented.
This erratum may be fixed in a future stepping of the product.
This erratum has been previously fixed.
There are no plans to fix this erratum.
page 10
page 10
page 10
page 11
page 11
page 11
page 12
Page
(
Cortina) may fix some of the errata in a future stepping of the
Status
NoFix
NoFix
NoFix
NoFix
NoFix
Fixed
Fixed
Section 1, Speed LED Stays Active During Reset
Section 2, Delay of Link While in Auto MDI/MDIX Enabled,
Forced 100 Mbps Mode
Section 3, Establishment of Link in Forced 100 Mbps Mode
Section 4, MDIO Interface and Repeated Polling
Section 5, 3.3 V Fiber Speed Selection
Section 6, Far-End Fault Reporting
Section 7, Internal Loopback Receive Disable
ERRATA
3.0 Summary Table of Changes
Page 6