EGLXT973QEA3V Intel, EGLXT973QEA3V Datasheet - Page 3

• Manufacturer Part Number: EGLXT973QEA3V
• Manufacturer: Intel

Specifications of EGLXT973QEA3V

• Lead Free Status / RoHS Status: Compliant

LXT973 PHY Transceiver
Specification Update
249737, Revision 10.0
20 March 2007
1.0
Cortina Systems
First release of this document from Cortina Systems, Inc.
Added/modified top label markings under
Modified
Added Erratum 10:
Added Documentation Changes 2 and 3 to
Added Errata 6 through 9 to
Changed status on Erratum 4:
Changed status on Erratum 5:
Added Erratum 6:
Added Erratum 7:
Added Erratum 8:
Added Erratum 9:
Added
Selection”
Added Erratum 3
Added Erratum 4
Added Erratum 5
Modified
“Establishment of Link in Forced 100 Mbps
Table 3, Product Ordering Information
Table 1, “Product
to the Errata table.
Revision History
“Establishment of Link in Forced 100 Mbps
“MDIO Interface and Repeated
“3.3 V Fiber Speed
®
“Far-End Fault Reporting”
“Internal Loopback Receive Disable”
“Changing Advertised Duplex While Link Is Up”
“Detection of Illegal Symbols After SSD”
Section 10, Port 1 LED Functionality Incorrect when Port 0 in Hardware Power-Down Mode
LXT973 10/100 Mbps Dual-Port Fast Ethernet PHY Transceiver
Information”. Replaced MM numbers.
Section 3.2, Errata
“MDIO Interface and Repeated
“3.3 V Fiber Speed
Selection”.
Identification
Section 8.0, Documentation Changes
to
Revision Date: 29 November 2005
Revision Date: 12 February 2003
Revision Date: 03 October 2002
Section 5.0, Errata
Revision Date: 20 March 2007
and
Revision Date: 07 March 2005
Revision Date: 14 March 2002
table.
Revision Date: 14 May 2004
Polling”.
Selection”.
Mode”,
Figure 4, Ordering Information – Sample
Information.
to
Revision 10.0
Revision: 009
Revision: 008
Revision: 007
Revision: 006
Revision: 005
Revision: 004
Section 5.0, Errata
“MDIO Interface and Repeated
to
Mode”.
Section 5.0, Errata
Polling”.
to
section.
Section 5.0, Errata
section.
section.
section.
section.
Polling”, and
under
Documentation
“3.3 V Fiber Speed
1.0 Revision History
Changes.
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