MCZ33780EG Freescale, MCZ33780EG Datasheet - Page 27

• Manufacturer Part Number: MCZ33780EG
• Manufacturer: Freescale

Specifications of MCZ33780EG

• Operating Supply Voltage (typ): 5/12/15/18/24V
• Operating Supply Voltage (min): 4.75/9V
• Operating Supply Voltage (max): 5.25/25V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Lead Free Status / RoHS Status: Compliant

REGISTER AND BIT DESCRIPTIONS
8 (00000 through 00111) are compatible with the 8 registers
Table 8. Register List
Analog Integrated Circuit Device Data
Freescale Semiconductor
R_FIFO_POP & R_POP_PTR != R_PUSH_PTR-1/
The 33780 has 22 registers, shown in
Register
Address
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
10000
10001
10010
10011
10100
10101
R_FIFO_POP & R_POP_PTR = R_PUSH_PTR-1/
R_POP_PTR = R_POP_PTR+1;
R_FIFO_EMPTY = TRUE;
~EN or ABORT or RSTB ACTIVE/
R_POP_PTR = R_POP_PTR+1;
Register Name
D0OFFSETH
D1OFFSETH
D0OFFSETL
D1OFFSETL
D0LENGTH
D1LENGTH
D0SSCTRL
D1SSCTRL
D01STAT
R_PUSH_PTR = 0;
R_POP_PTR = 0;
R_FIFO_EMPTY = TRUE;
D0SEED
D1SEED
D0SSUD
D1SSUD
D0CTRL
D1CTRL
D0POLY
D1POLY
DEN
D0H
D1H
D0L
D1L
R_FIFO_POP = R_FIFO_POP+1;
OVERFLOW = FALSE;
DBUS 0 upper byte
DBUS 0 lower byte
DBUS 1 upper byte
DBUS 1 lower byte
DBUS 0 and 1 status
DBUS 0 control
DBUS 1 control
DBUS enable bits
DBUS 0 CRC polynomial
DBUS 1CRC polynomial
DBUS 0 CRC seed
DBUS 1 CRC seed
DBUS 0 short word and CRC lengths
DBUS 1 short word and CRC lengths
DBUS 0 spread spectrum control
DBUS 1spread spectrum control
DBUS 0 spread spectrum offset high
DBUS 0 spread spectrum offset low
DBUS 1 spread spectrum offset high
DBUS 1 spread spectrum offset low
DBUS 0 spread spectrum up/down counter
DBUS 1 spread spectrum up/down counter
R_FIFO_POP/
Table
Figure 23. State Diagram of Receive FIFO
8. The lower
RX_NOT_EMPTY
RX_FULL
RX_IDLE
R_FIFO_PUSH/
R_FIFO_PUSH & R_PUSH_PTR = R_POP_PTR-1/
in the 68HC55. The remaining registers (01000 through
10101) are needed for the additional modes of operation.
R_PUSH_PTR = R_PUSH_PTR+1;
R_FIFO_EMPTY = FALSE;
R_PUSH_PTR = R_PUSH_PTR+1;
Register Definition
R_FIFO_PUSH & R_PUSHPTR != R_POP_PTR-1/
STATE TRANSISTIONS OCCUR
ON NEGATIVE EDGES OF R_FIFO_PUSH
AND R_FIFO_POP
R_PUSH_PTR = R_PUSH_PTR+1;
LOGIC COMMANDS AND REGISTERS
FUNCTIONAL DEVICE OPERATION
33780
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