GD82559ER S L3DG Intel, GD82559ER S L3DG Datasheet - Page 65

• Manufacturer Part Number: GD82559ER S L3DG
• Manufacturer: Intel

Specifications of GD82559ER S L3DG

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Temperature Classification: Commercial
• Package Type: BGA
• Mounting: Surface Mount
• Pin Count: 196
• Lead Free Status / RoHS Status: Not Compliant

8.1.2
8.1.3
8.1.4
8.1.5
8.1.6
8.1.7
Datasheet
System Control Block Command Word
Commands for the 82559ER’s Command and Receive units are placed in this register by the CPU.
System Control Block General Pointer
The System Control Block (SCB) General Pointer is a 32-bit field that points to various data
structures depending on the command in the CU Command or RU Command field.
PORT
The PORT interface allows software to perform certain control functions on the 82559ER. This
field is 32 bits wide:
Flash Control Register
The Flash Control Register is a 32-bit field that allows access to an external Flash device.
EEPROM Control Register
The EEPROM Control Register is a 32-bit field that enables a read from and a write to the external
EEPROM.
Management Data Interface Control Register
The Management Data Interface (MDI) Control register is a 32-bit field and is used to read and
write bits from the MDI.
•
•
31:26
25
24
23:20
19
18:16
31:30
Address and Data (bits 32:4)
PORT Function Selection (bits 3:0)
The 82559ER supports four PORT commands: Software Reset, Self-test, Selective Reset, and
Dump.
Bits
Bits
Specific
Interrupt Mask
SI
M
CUC
Reserved
RUC
These bits are reserved and should be set to 00b.
Name
Specific Interrupt Mask. Setting this bit to 1b causes the 82559ER to stop
generating an interrupt (in other words, de-assert the INTA# signal) on the
corresponding event.
Software Generated Interrupt. Setting this bit to 1b causes the 82559ER
to generate an interrupt. Writing a 0b to this bit has no effect.
Interrupt Mask. If the Interrupt Mask bit is set to 1b, the 82559ER will not
assert its INTA# pin. The M bit has higher precedence that the Specific
Interrupt Mask bits and the SI bit.
Command Unit Command. This field contains the CU command.
This bit is reserved and should be set to 0b.
Receive Unit Command. This field contains the RU command.
Description
Description
Networking Silicon — GD82559ER
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