HFIXF1110CC Intel, HFIXF1110CC Datasheet - Page 10

• Manufacturer Part Number: HFIXF1110CC
• Manufacturer: Intel

Specifications of HFIXF1110CC

• Number Of Transceivers: 1
• Screening Level: Commercial
• Mounting: Surface Mount
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Lead Free Status / RoHS Status: Not Compliant

Intel
Revision History
07-Oct-2005
10
®
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
Page #
Page #
Page #
32/38
180
183
125
116
110
28
48
49
All
All
45
41
42
42
45
66
97
99
1
1
Intel
Added
Table 7 “JTAG Interface Signal Descriptions”
Modified
Alphanumeric Order by Ball
Figure 6 “Ethernet Frame Format”
Figure 7 “PAUSE Frame Format”
Figure 44 “Markings”
Modified
Globally replaced the following: “AVDD” to “AVDD1P8_1, AVDD1P8_2” and “AVDD2” to
“AVDD2P5_1, AVDD2P5_2”.
Globally replaced the following: “AIDD” to “AIDD1P8_1, AIDD1P8_2” and “AIDD2” to “AIDD2P5_1,
AIDD2P5_2”.
Corrected ball number for RDAT15_P from K1 to K12 in
Descriptions”.
Removed Short Runts Threshold Register ($ Port_Index 0x14) and changed to Reserved in
“Table 51 “MAC Control Register
Changed product ordering number to reflect B2 [HFIXF1110CC.B2: 860817].
Modified Table 11 “Power Supply Signal Descriptions” [changed AVDD to AVDD1P8_1/2 and
AVDD2 to AVDD2P5_1/2].
Added note under Section 5.1.2.1, “Padding of Undersized Frames on Transmit”.
Modified Section 5.1.2.3.1, “Filter on Unicast Packet Match” [added text to end of paragraph].
Added Section 5.1.3, “Flow Control”.
Modified third and fourth paragraphs of Section 5.2.2.2, “CALENDAR_M”.
Added Section 6.2, “Analog Power Filtering” (IXF1110 only)
Modified Section 6.3.1, “TX FIFO” [added note].
Added Section 6.3.1.3, “TX FIFO Drain (IXF1110 Version)”.
Added Table 48 “SPI4-2 LVDS Rise/Fall Times”.
®
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
“552-Ceramic BGA (RoHS-compliant)”
Table 11 “Ball List in Alphanumeric Order by Signal Name”
Figure 47 “Ordering Information - Sample”
Order Number: 250210, Revision: 009
New image (Added RoHS marking)
Revision Number: 007 (Sheet 1 of 2)
Revision Date: August 10, 2004
Location”:
Revision Date: 07-Oct-2005
Revision Date: May 5, 2004
Revision Number: 009
Revision Number: 008
Map”.
Changed Preamble byte count to 7 bytes
Changed Preamble byte count to 7 bytes
Description
Description
Description
Changed Standard to 3.3 V LVTTL from 2.5 V CMOS
Table 3 “SPI4-2 Interface Signal
and
Table 12 “Ball List in
Datasheet