PXB4219EV34NP Infineon Technologies, PXB4219EV34NP Datasheet - Page 99

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PXB4219EV34NP

Manufacturer Part Number
PXB4219EV34NP
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PXB4219EV34NP

Data Rate
2.048Mbps
Number Of Channels
1
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
FTFRS[7:0]
RFCLK
Figure 25
Data Sheet
Framer Receive Interface:
FRCLKn
FRDATn
FRMFBn
Framer Transmit Interface:
FTCKOn
FTDATn
FTMFSn
FTFRSn
B8
B8
248
248
B1 B2 B3 B4 B5 B6 B7 B8 B1 B2 B3 B4 B5 B6 B7 B8 B1 B2 B3 B4 B5 B6 B7 B8
B1 B2 B3 B4 B5 B6 B7 B8 B1 B2 B3 B4 B5 B6 B7 B8 B1 B2 B3 B4 B5 B6 B7 B8
249
249
Framer Interface in GIM E1
250
250
251
251
Depending on bit p_ces in pcfN:
0 =
1 =
Depending on bit “tfpp” in “opmo”:
0 =
1 =
Framer Transmit Frame Synchronization Pulse
FTFRS is asserted synchronously to the transmission of the first
bit of the first timeslot of each frame.
Reference Clock
• Reference clock for the internal clock recovery circuit
• Depending on p_rx_em in pcfN: Optional emergency clock if
timeslot 31
timeslot 31
252
252
no transition on FRCLK is detected within 23 CLOCK cycles.
The segmentation continues using the RFCLK divided by four,
and using the byte-pattern programmed to a_emg_bpslct in
acfg for the cell payload.
253
253
254
254
255
255
256
256
Structured CES: Depending on “p_tx_mfs” in
“pcfN”:
0 = Double frame mode: FTMFS is asserted every
2 frames (250 µs)
1 = CRC multiframe mode: FTMFS is asserted
every 16 frames (2 ms))
Unstructured CES: Inactive level
FTMFS is active low
FTMFS is active high
1
1
2
2
99
3
3
PXB 4219E, PXB 4220E, PXB 4221E
timeslot 0
timeslot 0
4
4
5
5
6
6
7
7
8
8
9
9
Interface Description
10
10
11
11
timeslot 1
timeslot 1
12
12
13
13
IWE8, V3.4
2003-01-20
14
14
15
15
Figime1
16
16

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