PXB4219EV34NP Infineon Technologies, PXB4219EV34NP Datasheet - Page 107

• Manufacturer Part Number: PXB4219EV34NP
• Manufacturer: Infineon Technologies

Specifications of PXB4219EV34NP

• Data Rate: 2.048Mbps
• Number Of Channels: 1
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

5.2.2.2
In addition to the general backpressure mechanism, port specific backpressure is
available for ATM ports, when using the IWE8 as a UTOPIA level 2 PHY device
(“utconf[utlevel]” =0, “utmaster” = 0, “mapping_mode” =0 and “pcfN[p_atm]” =1). It needs
to be explicitly enabled with the “p_thr_m” bits in the “Port Configuration Registers”
(“pcfN”, see
Whenever the port transmit buffer filling level falls below the programmed value and the
port is selected via the UTOPIA PHY address, the TXCLAV signal is activated, allowing
another data transfer for that port. If this transfer exceeds the predefined buffer filling
level, the UTOPIA interface immediately enters backpressure state for this port.
When using the port specific backpressure mechanism (“p_thr_m” = 01
general threshold defined in the “Threshold Register” (“thrshld”, see
should be higher than the port specific threshold defined in the “Threshold Port Register”
(“thrspN”, see
5.2.3
In UTOPIA level 1 mode or UTOPIA level 2 single PHY mode, the framer port number
("port_nr[2:0]") can be transmitted via the UTOPIA interface. The field contains the
number of the physical (framer) port associated with that ATM cell. Its location inside the
ATM header is configurable via the “mapping_mode” bits in “utconf”
Possible locations are: GFC[3:1], VPI[7:5], VCI[15:13], VCI[7:5] or UDF[2:0].
In AAL mode, the channel number ("channel_nr", first timeslot number of a channel,
reference timeslot) has to be transmitted on the UTOPIA transmit interface via VCI[4:0].
If no discarding of cells with uncorrectable HEC error is selected on a specific port via
bits “a_hec_mode” in the register “acfg”
"pcfN"
most significant bit in the user defined octet at the UTOPIA interface. For correct
operation bit "p_cell_disc" must be cleared.
The bit ENB, bit 5 of the user defined octet, is responsible for the decision if cell
discarding shall base on CLP or CLPI.
Data Sheet
(Chapter
Port Specific Backpressure Mechanism
Sideband Signals of the UTOPIA Interface
Chapter
Chapter 7.38
7.1) an HEC error flag (HEF) indicates corrupted HEC by setting the
7.1).
to
Chapter
7.41).
(Chapter
107
PXB 4219E, PXB 4220E, PXB 4221E
7.2) and "p_cell_disc" in the register
Interface Description
(Chapter
Chapter
B
IWE8, V3.4
or 10
2003-01-20
B
7.34).
7.33)
) the